Commit Graph

102151 Commits

Author SHA1 Message Date
David Blaikie
d486d104b5 Adjust comments regarding non-relocated abbrev offset in debug_info.dwo
I'm not sure the comment in the implementation really adds a lot of
value (it's clear that we emit zero when no symbol is provided, but it
doesn't explain why we would do that). Happy to iterate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205386 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 02:04:51 +00:00
David Blaikie
5b8e4798ce Split debug_loc and debug_loc.dwo emission into two separate functions
Based on code review feedback from Eric Christopher on r204697

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205385 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 01:50:20 +00:00
David Blaikie
b2d73d1556 DebugInfo: Introduce DebugLocList to encapsulate a list of DebugLocEntries and an MC Label to refer to them
This removes the magic-number-esque code creating/retrieving the same
label for a debug_loc entry from two places and removes the last small
piece of reusable logic from emitDebugLoc so that there will be less
duplication when refactoring it into two functions (one for debug_loc,
the other for debug_loc.dwo).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205382 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 01:43:18 +00:00
Quentin Colombet
91b97ccd87 [ARM64][CollectLOH] Add some comments to explain how the LOHs
framework works (for the compiler part), since the design
document is not available.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205379 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-02 01:02:28 +00:00
Adrian Prantl
45063c008e Add a doxygen comment to DebugLocEntry::Merge.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205374 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 23:34:45 +00:00
David Blaikie
132285a59c DebugLocEntry: Actually merge the loc entry when returning true.
Seems we didn't have any test coverage for merging... awesome. So I
added some - but hit an llvm-objdump bug while I was there. I'm choosing
not to shave that yak right now.

Code review feedback/bug catch by Adrian Prantl in r205360.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205373 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 23:19:23 +00:00
David Blaikie
0afa71ea91 Fix accidental fallthrough in DebugLocEntry::hasSameValueOrLocation
No test case (this would invoke UB by examining uninitialized members,
etc, at best - and this code is apparently untested anyway - I'm about
to fix that)

Code review feedback from Adrian Prantl on r205360.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205367 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 22:25:09 +00:00
David Blaikie
2e33edd399 Remove unused function DebugLocEntry::isEmpty
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205365 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 22:06:18 +00:00
David Blaikie
e8ef6518ce Refactor out the comparison of the location/value in a DebugLocEntry
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205364 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 22:04:07 +00:00
David Blaikie
e8907d6649 Add inequality operator for MachineLocation.
Fixes the build I broke in r205360

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205361 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 21:54:52 +00:00
David Blaikie
e061a36590 DebugInfo: Split DebugLocEntry into its own file.
It seems big enough that it deserves its own file - but it is header
only, so there's no need for another cpp file, etc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205360 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 21:49:04 +00:00
Adrian Prantl
2f1e34736e Add a comment about the DIDescriptor class hierarchy.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205358 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 21:04:24 +00:00
Adrian Prantl
ccd539282b DwarfDebug: Prevent DebugLocEntry merging from coalescing two different
constants into only the first one.

rdar://14874886.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205357 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 21:04:18 +00:00
Hal Finkel
4a6c0afc52 [PowerPC] Add some missing VSX bitcast patterns
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205352 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 19:24:27 +00:00
Yaron Keren
f2dc47ce99 If isKnownWindowsMSVCEnvironment then getOS == Triple::Win32 and
Environment == Triple::MSVC so it will never be MinGW or Cygwin.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205349 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 18:52:55 +00:00
Hal Finkel
e30aa957e3 Implement X86TTI::getUnrollingPreferences
This provides an initial implementation of getUnrollingPreferences for x86.
getUnrollingPreferences is used by the generic (concatenation) unroller, which
is distinct from the unrolling done by the loop vectorizer. Many modern x86
cores have some kind of uop cache and loop-stream detector (LSD) used to
efficiently dispatch small loops, and taking full advantage of this requires
unrolling small loops (small here means 10s of uops).

These caches also have limits on the number of taken branches in the loop, and
so we also cap the loop unrolling factor based on the maximum "depth" of the
loop. This is currently calculated with a partial DFS traversal (partial
because it will stop early if the path length grows too much). This is still an
approximation, and one that is both conservative (because it does not account
for branches eliminated via block placement) and optimistic (because it is only
recording the maximum depth over minimum paths). Nevertheless, because the
loops that fit in these uop caches are so small, it is not clear how much the
details matter.

The original set of patches posted for review produced the following test-suite
performance results (from the TSVC benchmark) at that time:
  ControlLoops-dbl - 13% speedup
  ControlLoops-flt - 15% speedup
  Reductions-dbl - 7.5% speedup

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205348 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 18:50:34 +00:00
Hal Finkel
0d5c0629bb Add some additional fields to TTI::UnrollingPreferences
In preparation for an upcoming commit implementing unrolling preferences for
x86, this adds additional fields to the UnrollingPreferences structure:

 - PartialThreshold and PartialOptSizeThreshold - Like Threshold and
   OptSizeThreshold, but used when not fully unrolling. These are necessary
   because we need different thresholds for full unrolling from those used when
   partially unrolling (the full unrolling thresholds are generally going to be
   larger).

 - MaxCount - A cap on the unrolling factor when partially unrolling. This can
   be used by a target to prevent the unrolled loop from exceeding some
   resource limit independent of the loop size (such as number of branches).

There should be no functionality change for any in-tree targets.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205347 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 18:50:30 +00:00
Hal Finkel
a7a02cb737 Use TopTTI->getGEPCost from within getUserCost
The implementation of getUserCost had duplicated (and hard-coded) the default
logic in getGEPCost. Instead, it is better to use getGEPCost directly, which
limits the default logic to the implementation of one function, and allows
targets to override the behavior.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205346 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 18:50:06 +00:00
Kai Nacke
54c55edb0a [mips] Add Octeon cnMips instructions mtmX and mtpX
Adds the Octeon cnMips instructions "load multiplier register MPLx" and "load product register Px".
Includes tests.

Reviews by: Daniel.Sanders@imgtec.com

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205343 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 18:35:26 +00:00
Reid Kleckner
f319a2c3b3 Support segmented stacks on Win64
Identical to Win32 method except the GS segment register is used for TLS
instead of FS and pvArbitrary is at TEB offset 0x28 instead of 0x14.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205342 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 18:34:21 +00:00
Matt Arsenault
a173c01556 Fix missing RUN line in test
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205341 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 18:34:13 +00:00
Yaron Keren
bec4ff5781 isTargetWindows() renamed to isTargetKnownWindowsMSVC()
to reflect its current functionality.

Based on Takumi NAKAMURA suggestion.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205338 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 18:15:34 +00:00
Matt Arsenault
eb8eac6be2 Make isSetCCEquivalent respect the TargetBooleanContents
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205336 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 18:13:26 +00:00
Matt Arsenault
1ff5f1a061 Add helpers for checking if a value is a target boolean constant.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205335 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 18:13:22 +00:00
David Blaikie
6b10f3a87d DebugInfo: Factor out common functionality for rendering debug_loc and debug_loc.dwo location list entries
In preparation for refactoring this function into two, one for
debug_loc, one for debug_loc.dwo.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205324 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 16:17:41 +00:00
David Blaikie
6817d33dda Cleanup remaining use of removed variable to fix the build
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205323 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 16:13:29 +00:00
David Blaikie
fabe5ce566 Simplify debug_loc.dwo handling slightly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205322 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 16:09:49 +00:00
Christian Pirker
3a64202502 ARM: rename ARMle/ARMbe with ARMLE/ARMBE, and Thumble/Thumbbe with ThumbLE/ThumbBE
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205317 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 15:19:30 +00:00
Tim Northover
cb68a2e3ab ARM: teach LLVM that Cortex-A7 is very similar to A8.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205314 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 14:10:07 +00:00
Aaron Ballman
77d76519dc Attempting to fix r205124, which had failed asserts when built with MSVC.
Suggestion from Yaron Keren.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205313 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 13:56:35 +00:00
Tim Northover
c077472250 ARM: add cyclone CPU with ZeroCycleZeroing feature.
The Cyclone CPU is similar to swift for most LLVM purposes, but does have two
preferred instructions for zeroing a VFP register. This teaches LLVM about
them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205309 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 13:22:02 +00:00
Daniel Sanders
279edf967e [mips] Renamed ParseAnyRegisterWithoutDollar to MatchAnyRegisterWithoutDollar
This is for consistency with other functions. The Parse* functions consume
tokens and the Match* functions don't.

No functional change.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205305 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 12:35:23 +00:00
Aaron Ballman
5570517bec Fixing an MSVC warning about widening the result of a 32-bit shift implicitly. No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205304 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 12:24:25 +00:00
Tim Northover
ed839120c4 ARM64: add intrinsic for pmull (p64 x p64 = p128) operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205302 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 12:22:37 +00:00
Aaron Ballman
103683c4cb Fixing warnings in the MSVC build. No functional changes intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205301 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 12:22:20 +00:00
Daniel Sanders
f2452c4cec [mips] Extend ParseJumpTarget to support the full symbol expression syntax.
Summary:
This should fix the issues the D3222 caused in lld. Testcase is based on
the one that failed in the buildbot.

Depends on D3233

Reviewers: matheusalmeida, vmedic

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3234

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205298 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 10:41:48 +00:00
Daniel Sanders
1302349706 [mips] Use AsmLexer::peekTok() to resolve the conflict between $reg and $sym
Summary:
Parsing registers no longer consume the $ token before it's confirmed whether it really has a register or not, therefore it's no longer impossible to match symbols if registers were tried first.

Depends on D3232

Reviewers: matheusalmeida, vmedic

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3233

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205297 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 10:40:14 +00:00
Daniel Sanders
382fb96882 [mips] Hoist Parser.Lex() calls out of MatchAnyRegisterNameWithoutDollar()
Summary:
No functional change

Depends on D3222

Reviewers: matheusalmeida, vmedic

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3232

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205295 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 10:37:46 +00:00
Tim Northover
acfb679618 ARM64: add patterns for more lane-wise ld1/st1 operations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205294 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 10:37:09 +00:00
Tim Northover
233c567ea9 ARM64: fix bug in ld3r (1d) SelectionDAG.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205293 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 10:37:03 +00:00
Daniel Sanders
bd48d31b37 [mips] Rewrite MipsAsmParser and MipsOperand.
Summary:
Highlights:
- Registers are resolved much later (by the render method).
  Prior to that point, GPR32's/GPR64's are GPR's regardless of register
  size. Similarly FGR32's/FGR64's/AFGR64's are FGR's regardless of register
  size or FR mode. Numeric registers can be anything.
- All registers are parsed the same way everywhere (even when handling
  symbol aliasing)
  - One consequence is that all registers can be specified numerically
    almost anywhere (e.g. $fccX, $wX). The exception is symbol aliasing
    but that can be easily resolved.
- Removes the need for the hasConsumedDollar hack
- Parenthesis and Bracket suffixes are handled generically
- Micromips instructions are parsed directly instead of going through the
  standard encodings first.
- rdhwr accepts all 32 registers, and the following instructions that previously
  xfailed now work:
    ddiv, ddivu, div, divu, cvt.l.[ds], se[bh], wsbh, floor.w.[ds], c.ngl.d,
    c.sf.s, dsbh, dshd, madd.s, msub.s, nmadd.s, nmsub.s, swxc1
- Diagnostics involving registers point at the correct character (the $)
- There's only one kind of immediate in MipsOperand. LSA immediates are handled
  by the predicate and renderer.

Lowlights:
- Hardcoded '$zero' in the div patterns is handled with a hack.
  MipsOperand::isReg() will return true for a k_RegisterIndex token
  with Index == 0 and getReg() will return ZERO for this case. Note that it
  doesn't return ZERO_64 on isGP64() targets.
- I haven't cleaned up all of the now-unused functions.
  Some more of the generic parser could be removed too (integers and relocs
  for example).
- insve.df needed a custom decoder to handle the implicit fourth operand that
  was needed to make it parse correctly. The difficulty was that the matcher
  expected a Token<'0'> but gets an Imm<0>. Adding an implicit zero solved this.

Reviewers: matheusalmeida, vmedic

Reviewed By: matheusalmeida

Differential Revision: http://llvm-reviews.chandlerc.com/D3222

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205292 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 10:35:28 +00:00
Renato Golin
a5b283ab23 Recover TableGen/LangRef, make it official
Making the new TableGen documentation official and marking the old file as
"Moved". Also, reverting the original LangRef as the normative formal
description of the language, while keeping the "new" LangRef as LangIntro
for the less inlcined to reading language grammars.

We should remove TableGenFundamentals.rst one day, but for now, just a
warning that it moved will have to do, while we make sure there are no more
links to it from elsewhere.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205289 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 09:51:49 +00:00
Alexey Volkov
1d75829ddc [x86] Do not convert to cmp32 for Atom arch by Sergey Okunev
Differential Revision: http://llvm-reviews.chandlerc.com/D2824


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205288 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 08:13:07 +00:00
David Blaikie
a07c1ab4e6 DebugInfo: Avoid creating unnecessary/empty line tables and remove the special case of '0' in DwarfCompileUnit::initStmtList by just always using a label difference
This moves one case of raw text checking down into the MCStreamer
interfaces in the form of a virtual function, even if we ultimately end
up consolidating on the one-or-many line tables issue one day, this is
nicer in the interim. This just generally streamlines a bunch of use
cases into a common code path.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205287 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 08:07:52 +00:00
David Blaikie
5b2de5dd3d DebugInfo: Emit relocation to debug_line section when emitting asm for asm
I don't think this is reachable by any frontend (why would you transform
asm to asm+debug info?) but it helps tidy up some of this code, avoid
the weird special case of "emit the first CU, store the label, then emit
the rest" in MCDwarfLineTable::Emit by instead having the
DWARF-for-assembly case use the same codepath as DwarfDebug.cpp, by
registering the label of the debug_line section, thus causing it to be
emitted. (with a special case in asm output to just emit the label since
asm output uses the .loc directives, etc, rather than the debug_loc
directly)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205286 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 07:35:52 +00:00
Adrian Prantl
75b7b95687 Remove FIXMEs. The scope of a Variable is always a lexical scope; there is
nothing to be gained from switching this over to a DIScopeRef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205281 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 03:50:01 +00:00
Adrian Prantl
1a2786b900 LTO type uniquing: store the Decl field of a DIImportedEntity as a DIRef.
No other functionality changes, DIBuilder testcase is included in a paired
CFE commit.

This relaxes the assertion in isScopeRef to also accept subclasses of
DIScope.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205279 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 03:41:04 +00:00
Adrian Prantl
e977127a9d Add a comment about type-uniquing ObjC types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205277 91177308-0d34-0410-b5e6-96231b3b80d8
2014-04-01 03:40:59 +00:00
David Blaikie
e94fe0423e Comment to describe the debug_loc.dwo constants
Code review feedback from Eric Christopher on r204697

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205268 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-31 23:50:20 +00:00
Saleem Abdulrasool
442c61dd9a MCJIT: ensure that cygwin is identified properly
Cygwin is now a proper environment rather than an OS.  This updates the MCJIT
tests to avoid execution on Cygwin.  This fixes native cygwin tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205266 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-31 23:42:23 +00:00