Commit Graph

75767 Commits

Author SHA1 Message Date
Chandler Carruth
eeeec3ce0d [PM] Separate the TargetLibraryInfo object from the immutable pass.
The pass is really just a means of accessing a cached instance of the
TargetLibraryInfo object, and this way we can re-use that object for the
new pass manager as its result.

Lots of delta, but nothing interesting happening here. This is the
common pattern that is developing to allow analyses to live in both the
old and new pass manager -- a wrapper pass in the old pass manager
emulates the separation intrinsic to the new pass manager between the
result and pass for analyses.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226157 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 10:41:28 +00:00
Craig Topper
06185e7f6b Hide some redundant AVX512 instructions from the asm parser, but force them to show up in the disassembler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226155 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 09:37:15 +00:00
David Majnemer
cdfb69b2a3 SimplifyIndVar: Remove unused variable
OtherOperandIdx is not used anymore, remove it to silence warnings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226138 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 07:11:23 +00:00
NAKAMURA Takumi
20b033eae5 Update libdeps since TLI was moved from Target to Analysis in r226078.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226126 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 05:21:00 +00:00
NAKAMURA Takumi
9500df49eb Reorder.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226125 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 05:20:46 +00:00
Hal Finkel
f908e37144 Revert "r226071 - [RegisterCoalescer] Remove copies to reserved registers"
Reverting this while I investigate some bad behavior this is causing. As a
possibly-related issue, adding -verify-machineinstrs to one of the test cases
now fails because of this change:

  llc test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll -march=x86-64 -o - -verify-machineinstrs

*** Bad machine code: No instruction at def index ***
- function:    foo
- basic block: BB#0 return (0x10007e21f10) [0B;736B)
- liverange:   [128r,128d:9)[160r,160d:8)[176r,176d:7)[336r,336d:6)[464r,464d:5)[480r,480d:4)[624r,624d:3)[752r,752d:2)[768r,768d:1)[78
4r,784d:0)  0@784r 1@768r 2@752r 3@624r 4@480r 5@464r 6@336r 7@176r 8@160r 9@128r
- register:    %DS
Valno #3 is defined at 624r

*** Bad machine code: Live segment doesn't end at a valid instruction ***
- function:    foo
- basic block: BB#0 return (0x10007e21f10) [0B;736B)
- liverange:   [128r,128d:9)[160r,160d:8)[176r,176d:7)[336r,336d:6)[464r,464d:5)[480r,480d:4)[624r,624d:3)[752r,752d:2)[768r,768d:1)[78
4r,784d:0)  0@784r 1@768r 2@752r 3@624r 4@480r 5@464r 6@336r 7@176r 8@160r 9@128r
- register:    %DS
[624r,624d:3)
LLVM ERROR: Found 2 machine code errors.

where 624r corresponds exactly to the interval combining change:

624B    %RSP<def> = COPY %vreg16; GR64:%vreg16
        Considering merging %vreg16 with %RSP
                RHS = %vreg16 [608r,624r:0)  0@608r
                updated: 608B   %RSP<def> = MOV64rm <fi#3>, 1, %noreg, 0, %noreg; mem:LD8[%saved_stack.1]
        Success: %vreg16 -> %RSP
        Result = %RSP

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226086 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 03:08:59 +00:00
Chandler Carruth
dd1b7ed60b Switch this header file to not hard-code Windows line endings.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226081 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 02:21:56 +00:00
Chandler Carruth
bda134910a [PM] Move TargetLibraryInfo into the Analysis library.
While the term "Target" is in the name, it doesn't really have to do
with the LLVM Target library -- this isn't an abstraction which LLVM
targets generally need to implement or extend. It has much more to do
with modeling the various runtime libraries on different OSes and with
different runtime environments. The "target" in this sense is the more
general sense of a target of cross compilation.

This is in preparation for porting this analysis to the new pass
manager.

No functionality changed, and updates inbound for Clang and Polly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226078 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 02:16:27 +00:00
NAKAMURA Takumi
635656e231 Win64Exception.cpp: Try to fix crash for x64 EH. "Per" might be null there.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226077 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 02:15:21 +00:00
Sanjoy Das
7ec1829823 Fix PR22222
The bug was introduced in r225282. r225282 assumed that sub X, Y is
the same as add X, -Y. This is not correct if we are going to upgrade
the sub to sub nuw. This change fixes the issue by making the
optimization ignore sub instructions.

Differential Revision: http://reviews.llvm.org/D6979



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226075 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 01:46:09 +00:00
Hal Finkel
47ab8c106f [RegisterCoalescer] Remove copies to reserved registers
This allows the RegisterCoalescer to join "non-flipped" range pairs with a
physical destination register -- which allows the RegisterCoalescer to remove
copies like this:

<vreg> = something (maybe a load, for example)
... (things that don't use PHYSREG)
PHYSREG = COPY <vreg>

(with all of the restrictions normally applied by the RegisterCoalescer: having
compatible register classes, etc. )

Previously, the RegisterCoalescer handled only the opposite case (copying
*from* a physical register). I don't handle the problem fully here, but try to
get the common case where there is only one use of <vreg> (the COPY).

An upcoming commit to the PowerPC backend will make this pattern much more
common on PPC64/ELF systems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226071 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 01:25:28 +00:00
Hal Finkel
4572a0a0a2 [PowerPC] Add assembler support for mcrfs and friends
Fill out our support for the floating-point status and control register
instructions (mcrfs and friends). As it turns out, these are necessary for
compiling src/test/harness_fp.h in TBB for PowerPC.

Thanks to Raf Schietekat for reporting the issue!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226070 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 01:00:53 +00:00
Richard Smith
ef7d38d35a For PR21145: recognise a builtin call to a known deallocation function even if
it's defined in the current module. Clang generates this situation for the
C++14 sized deallocation functions, because it generates a weak definition in
case one isn't provided by the C++ runtime library.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226069 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 01:00:33 +00:00
Colin LeMahieu
32467012f6 [Hexagon] Replacing old versions of stores and loads.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226065 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-15 00:15:30 +00:00
Ramkumar Ramachandra
fba4d82671 [GC] CodeGenPrep transform: simplify offsetable relocate
The transform is somewhat involved, but the basic idea is simple: find
derived pointers that have been offset from the base pointer using gep
and replace the relocate of the derived pointer with a gep to the
relocated base pointer (with the same offset).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226060 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 23:27:07 +00:00
Colin LeMahieu
419855bfeb [Hexagon] Replacing old version of convert and load f64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226057 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 23:07:36 +00:00
Philip Reames
8f9d11309a getMangledTypeStr: clarify how it mangles types, and add tests
"Write a set of tests that show how name mangling is done for overloaded intrinsics."  These happen to use gc.relocates to exercise the codepath in question, but is not a GC specific test.

Patch by: artagnon@gmail.com
Differential Revision: http://reviews.llvm.org/D6915



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226056 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 23:05:17 +00:00
NAKAMURA Takumi
2495c84184 Update libdeps in NVPTXCodeGen, since r225944.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226055 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 23:01:36 +00:00
Reid Kleckner
4ac8ae7ea1 Use MMI->getPersonality() instead of MMI->getPersonalities()[MMI->getPersonalityIndex()]
Also nuke the comment about supporting multiple personalities in a
single function, aka PR1414. That's just crazy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226052 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 22:47:54 +00:00
Duncan P. N. Exon Smith
37ac8d3622 IR: Move MDLocation into place
This commit moves `MDLocation`, finishing off PR21433.  There's an
accompanying clang commit for frontend testcases.  I'll attach the
testcase upgrade script I used to PR21433 to help out-of-tree
frontends/backends.

This changes the schema for `DebugLoc` and `DILocation` from:

    !{i32 3, i32 7, !7, !8}

to:

    !MDLocation(line: 3, column: 7, scope: !7, inlinedAt: !8)

Note that empty fields (line/column: 0 and inlinedAt: null) don't get
printed by the assembly writer.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226048 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 22:27:36 +00:00
Matthias Braun
de8202b084 MachineVerifier: Allow undef reads if a matching superreg is defined.
Summary:
Some pseudo instruction expansions break down a wide register use into
multiple uses of smaller sub registers. If the super register was
partially undefined the broken down sub registers may be completely
undefined now leading to MachineVerifier complaints. Unfortunately
liveness information to add the required dead flags is not easily
(cheaply) available when expanding pseudo instructions.

This commit changes the verifier to be quiet if there is an additional
implicit use of a super register. Pseudo instruction expanders can use
this to mark cases where partially defined values get potentially broken
into completely undefined ones.

Differential Revision: http://reviews.llvm.org/D6973

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226047 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 22:25:14 +00:00
Duncan P. N. Exon Smith
bf13dd03e7 IR: Always print MDLocation line
Print `MDLocation`'s `line` field even when it's 0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226046 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 22:14:26 +00:00
Duncan P. N. Exon Smith
0294f639d2 IR: Drop metadata references more aggressively during teardown
Sometimes teardown happens before the debug info graph is complete
(e.g., when clang throws an error).  In that case, `MDNode`s will still
have RAUW, so deleting constants that the `MDNode`s point at will be
relatively expensive -- it'll cause re-uniquing all up the chain (what
I've been referring to as "teardown madness").

So, drop references *before* deleting constants.  We need to drop a few
more references now: the metadata side of the metadata/value bridges
needs to be dropped off the cliff along with the rest of it (previously,
the bridges were cleaned before we did anything with the `MDNode`s).

There's no real functionality change here -- state before and after
`LLVMContextImpl::~LLVMContextImpl()` is unchanged -- so no testcase.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226044 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 21:58:17 +00:00
Rafael Espindola
33f5127540 Don't create new comdats in CodeGen.
This patch stops the implicit creation of comdats during codegen.

Clang now sets the comdat explicitly when it is required. With this patch clang and gcc
now produce the same result in pr19848.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226038 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 20:55:48 +00:00
Colin LeMahieu
f7db2526ad [Hexagon] Removing old, unused !tstbit instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226036 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 20:26:15 +00:00
Chandler Carruth
8af8091ef5 [MBP] Add flags to disable the BadCFGConflict check in MachineBlockPlacement.
Some benchmarks have shown that this could lead to a potential
performance benefit, and so adding some flags to try to help measure the
difference.

A possible explanation. In diamond-shaped CFGs (A followed by either
B or C both followed by D), putting B and C both in between A and
D leads to the code being less dense than it could be. Always either
B or C have to be skipped increasing the chance of cache misses etc.
Moving either B or C to after D might be beneficial on average.

In the long run, but we should probably do a better job of analyzing the
basic block and branch probabilities to move the correct one of B or
C to after D. But even if we don't use this in the long run, it is
a good baseline for benchmarking.

Original patch authored by Daniel Jasper with test tweaks and a second
flag added by me.

Differential Revision: http://reviews.llvm.org/D6969

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226034 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 20:19:29 +00:00
Bill Schmidt
11abe69e98 [PPC64] Add support for the ICBT instruction on POWER8.
Patch by Kit Barton.

Support for the ICBT instruction is currently present, but limited to
embedded processors. This change adds a new FeatureICBT that can be used
to identify whether the ICBT instruction is available on a specific processor.

Two new tests are added:
 * Positive test to ensure the icbt instruction is present when using
-mcpu=pwr8
 * Negative test to ensure the icbt instruction is not generated when
using -mcpu=pwr7

Both test cases use the Prefetch opcode in LLVM. They are based on the
ppc64-prefetch.ll test case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226033 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 20:17:10 +00:00
Duncan P. N. Exon Smith
9e4a11f46c IR: Fix a use-after-free in RAUW
Happened pretty commonly during `LLVMContext` teardown when `clang -g`
hit an error.  This fixes the use-after-free.  Next I'll clean up
teardown so that it's not RAUW'ing when metadata-tracked values are
deleted (only really causes a problem if the graph is mid-construction
when teardown starts, but it's still unnecessary work).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226029 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 19:56:10 +00:00
David Majnemer
5e8cd99f55 InstCombine: Don't take A-B<0 into A<B if A-B has other uses
This fixes PR22226.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226023 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 19:26:56 +00:00
Rafael Espindola
8327f0bca1 Revert "Add r224985 back with two fixes."
This reverts commit r225644 while I debug a regression.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226022 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 19:07:23 +00:00
Reid Kleckner
4350881a94 Emit the Itanium LSDA for unknown EH personalities on Win64
This fixes lots of generic CodeGen tests that use __gcc_personality_v0.
This suggests that using ExceptionHandling::MSVC was a mistake, and we
should instead classify each function by personality function. This
would, for example, allow us to LTO a binary containing uses of SEH and
Itanium EH.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226019 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 18:50:10 +00:00
Reid Kleckner
983125f9b4 Remove dead code for llvm.eh.selector in the old EH model
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226018 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 18:49:39 +00:00
Colin LeMahieu
77b1c04ef8 [Hexagon] Removing old versions of cmph and updating references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226013 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 18:26:14 +00:00
Rafael Espindola
ad946a868f Add support for comdats with names larger than 256 characters.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226012 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 18:25:45 +00:00
Colin LeMahieu
c788b1f524 [Hexagon] Removing old versions of cmpb and updating references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226006 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 18:05:44 +00:00
Colin LeMahieu
8b869b4ae9 [Hexagon] Deleting versions of compare-not that don't have encoding information. Updating references.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226003 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 16:49:12 +00:00
Tom Stellard
65e0a4d4da R600/SI: Use IMPLICIT_DEF and KILL when failing to spill VGPRs
This helps us avoid 'invalid register class for operand' verifier
errors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225989 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 15:42:34 +00:00
Tom Stellard
33040cf56e R600/SI: Spill VGPRs to scratch space for compute shaders
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225988 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 15:42:31 +00:00
Olivier Sallenave
01cef58e6b Override the TLI callback enableAggressiveFMAFusion and return true. Indeed, fmul, fmadd and fadd nodes cost the same number of cycles, so we can enable more combining heuristics to produce more fmadd nodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225984 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 14:47:24 +00:00
Erik Eckstein
d6238e7b7e reapply: SLPVectorizer: Cache results from memory alias checking.
This speeds up the dependency calculations for blocks with many load/store/call instructions.
Beside the improved runtime, there is no functional change.

Compared to the original commit, this re-applied commit contains a bug fix which ensures that there are
no incorrect collisions in the alias cache.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225977 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 11:24:47 +00:00
Chandler Carruth
1b279144ec [cleanup] Re-sort all the #include lines in LLVM using
utils/sort_includes.py.

I clearly haven't done this in a while, so more changed than usual. This
even uncovered a missing include from the InstrProf library that I've
added. No functionality changed here, just mechanical cleanup of the
include order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225974 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 11:23:27 +00:00
Jyoti Allur
fd06dd8efc Correct POP handling for v7m
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225972 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 10:48:16 +00:00
Chandler Carruth
8c3a02f8fe [PM] Port domtree to the new pass manager (at last).
This adds the domtree analysis to the new pass manager. The analysis
returns the same DominatorTree result entity used by the old pass
manager and essentially all of the code is shared. We just have
different boilerplate for running and printing the analysis.

I've converted one test to run in both modes just to make sure this is
exercised while both are live in the tree.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225969 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 10:19:28 +00:00
Kai Nacke
92e28620d3 [mips] Refine octeon instructions seq/seqi/sne/snei
This commit refines the pattern for the octeon seq/seqi/sne/snei instructions.
The target register is set to 0 or 1 according to the result of the comparison.
In C, this is something like

rd = (unsigned long)(rs == rt)

This commit adds a zext to bring the result to i64. With this change the
instruction is selected for this type of code. (gcc produces the same code for
the above C code.)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225968 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 10:19:09 +00:00
Brad Smith
f449c53c89 Use the integrated assembler by default on SPARC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225957 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 07:53:39 +00:00
David Majnemer
3eafccc036 Use the operand vector instead so inline assembly can be validated too
The buildbots got upset after r225941, this should hopefully fix things.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225954 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 06:14:36 +00:00
Mehdi Amini
df6c8efd9d SelectionDAG: add a -filter-view-dags option to llc
This option takes the name of the basic block you want to visualize
with -view-*-dags

Differential Revision: http://reviews.llvm.org/D6948



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225953 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 06:03:18 +00:00
Mehdi Amini
cfe92407cd DAG Combiner: Fold SelectCC When Cond is UNDEF
In case folding a node end up with a NaN as operand for the select, 
the folding of the condition of the selectcc node returns "UNDEF".

Differential Revision: http://reviews.llvm.org/D6889



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225952 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 05:45:24 +00:00
Mehdi Amini
125de50e12 Add assertions for out of bound index in ComputeLinearIndex
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225951 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 05:38:48 +00:00
Saleem Abdulrasool
e1f65e239a X86: only access operands if they are present
If there is no associated immediate (MS style inline asm), do not try to access
the operand, assume that it is valid.  This should fix the buildbots after SVN
r225941.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225950 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 05:37:10 +00:00