Bruno Cardoso Lopes
d01ef7d978
Add AVX versions of SSE4.1 EXTRACTPS patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139071 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:47:03 +00:00
Bruno Cardoso Lopes
2b0e0a42d1
Add AVX versions for SSE4.1 MOVZX* patterns
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139070 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:47:01 +00:00
Bruno Cardoso Lopes
a67806530c
Add one more AVX pattern for MOVZPQILo2PQI
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139069 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:58 +00:00
Bruno Cardoso Lopes
d29dd5ec9f
Move PUNPCKLQDQ splat pattern close to the instruction definition and
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duplicate it for AVX mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139068 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:56 +00:00
Bruno Cardoso Lopes
914a2a319c
Add AVX pattern versions for PSHUFB,PSIGN{B,W,D}
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139067 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:54 +00:00
Bruno Cardoso Lopes
a4ac989a1c
Add AVX versions of MOVZDI2PDI patterns. Use SUBREG_TO_REG to indicate
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that the AVX versions (even the 128-bit ones) all clear the upper part
of the destination register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139066 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:51 +00:00
Bruno Cardoso Lopes
152a287374
Enforce subtarget checks in a few places to be explicit when the
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pattern should be matched
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139065 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:49 +00:00
Bruno Cardoso Lopes
5ab6dcc4bb
Tidy up code moving patterns to their appropriate place!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139064 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:47 +00:00
Bruno Cardoso Lopes
0e59a04849
Add AVX versions of FsMOVAPS and FsMOVAPS. Teach X86InstrInfo how to use
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it!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139063 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:45 +00:00
Bruno Cardoso Lopes
645b8be38a
Teach X86FastISel to use AVX versions of instructions when possible
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139062 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:42 +00:00
Bruno Cardoso Lopes
1aab5515f6
Fix 80-column and style
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139061 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:40 +00:00
Bruno Cardoso Lopes
e4ccf8a86c
Tidy up some SSE/AVX convert intrinsics. Also add an AVX version of
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OptForSize pattern
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139060 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:46:38 +00:00
Owen Anderson
7ab15f6d4b
Fix a truly heinous bug in DAGCombine related to AssertZext.
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If we have a chain of zext -> assert_zext -> zext -> use, the first zext would get simplified away because of the later zext, and then the later zext would get simplified away because of the assert. The solution is to teach SimplifyDemandedBits that assert_zext demands all of the high bits of its input, rather than only those demanded by its users. No testcase because the only example I have manifests as llvm-gcc miscompiling LLVM, and I haven't found a smaller case that reproduces this problem.
Fixes <rdar://problem/10063365>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139059 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-03 00:26:49 +00:00
Jakob Stoklund Olesen
5047d76575
Pseudo CMOV instructions don't clobber EFLAGS.
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The explanation about a 0 argument being materialized as xor is no
longer valid. Rematerialization will check if EFLAGS is live before
clobbering it.
The code produced by X86TargetLowering::EmitLoweredSelect does not
clobber EFLAGS.
This causes one less testb instruction to be generated in the cmov.ll
test case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139057 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:52:55 +00:00
Jakob Stoklund Olesen
b8e052e123
Check for EFLAGS live-out before clobbering it.
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It is only allowed to clobber EFLAGS at the end of a block if it isn't
live-in to any successor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139056 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:52:52 +00:00
Jakob Stoklund Olesen
4a1b9d82a4
Use existing function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139055 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:52:49 +00:00
Jim Grosbach
6c3e11ea55
Thumb2 parsing and encoding for BXJ.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139053 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:43:09 +00:00
Jim Grosbach
a110988b39
Thumb2 parsing and encoding of B instruction.
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Tweak handling of IT blocks a bit to enable this. The differentiation between
B and Bcc needs special sauce.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139049 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 23:22:08 +00:00
Jakob Stoklund Olesen
439f71eb30
Remove unused variables.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 22:41:25 +00:00
Eli Friedman
4136d23c48
Don't fast-isel for atomic load/store; some cases require extra handling missing from fast-isel.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139044 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 22:33:24 +00:00
Jim Grosbach
5f25fb01b4
Thumb2 parsing and encoding for ASR.
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For other shift and rotate instructions, too. Tests for those forthcoming
as I work my way through the ISA.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139040 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 21:28:54 +00:00
Andrew Trick
252ef7a61a
Comment and clarifying assert.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139036 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 21:20:46 +00:00
Bill Wendling
271439053d
No need to get fancy inserting a PHI node when the values are stored in stack
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slots. This fixes a bug where the number of nodes coming into the PHI node may
not equal the number of predecessors. E.g., two or more landingpad instructions
may require a PHI before reaching the eh.exception and eh.selector instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139035 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 21:17:08 +00:00
Kevin Enderby
d5705fe50d
Change X86 disassembly to print immediates values as signed by default. Special
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case those instructions that the immediate is not sign-extend. radr://8795217
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139028 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 20:01:23 +00:00
Jim Grosbach
8e0c7697fd
Tidy up. Formatting.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:46:15 +00:00
Bill Wendling
9dc31e8705
Update comments to reflect reality.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139023 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:43:33 +00:00
Jim Grosbach
d2990107a9
Tidy up. 80 columns.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139022 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:43:25 +00:00
Jim Grosbach
5c1ac55542
Thumb2 parsing and encoding for AND (register).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:41:35 +00:00
Jakob Stoklund Olesen
8040e06434
Simplify by using isFullCopy().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139019 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:18:29 +00:00
Bill Wendling
d199aa012b
Revert r138826 until PR10834 can be fixed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139018 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:15:04 +00:00
Jim Grosbach
f0851e5d95
Thumb2 parsing and encoding for ADD (register).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139017 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:14:46 +00:00
Duncan Sands
147272b8a7
Darwin wants ctors/dtors to be ordered the other way round to linux.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139015 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 18:07:19 +00:00
Andrew Trick
12d1ebe943
Enable SCEV-based unrolling by default.
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This changes loop unrolling to use the same mechanism for trip count
computation as indvars. This is a stronger check that tends to unroll
more loops. A very common side-effect is that many single iteration
loops will be removed sooner. The real goal was simply to remove
dependence on canonical IVs.
x86 is break even.
ARM performance changes to expect (+ is good):
External/SPEC/CFP2000/183.equake/183.equake +13%
SingleSource/Benchmarks/Dhrystone/fldry +21%
MultiSource/Applications/spiff/spiff +3%
SingleSource/Benchmarks/Stanford/Puzzle -14%
The Puzzle regression is actually an improvement in loop optimization
that defeats GVN: rdar://problem/10065079.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139009 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 17:26:28 +00:00
Jakub Staszak
8370d91f1e
Return undef value (instead of arbitrary) for wrong or undef index in
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ConstantVector.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139007 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 17:01:40 +00:00
Jakub Staszak
4c6b8bee2a
ConstantVector returns arbitrary value for the wrong index.
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This fixes PR10813.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139006 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 15:43:43 +00:00
Jakub Staszak
8cec759339
Compare type size instead of type _store_ size to make sure that BitCastInst
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will be valid. This fixes PR10820.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139005 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 14:57:37 +00:00
Kalle Raiskila
989621f1f8
Pass signed (not unsigned) 10 bit field to SPU 'ori' instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139004 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 10:05:01 +00:00
Bill Wendling
24fbb5875c
Perform the upgrading of the old EH to the new EH in a more sane manner.
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Perform the upgrading in steps.
* First, create a map of the invokes to the EH intrinsics.
* Next, take that mapping and determine if the invoke's unwind destination has a
single predecessor. If not, then create a new empty block to hold the new
landingpad instruction.
* Create a landingpad instruction into the uwnind destination. Fill it with the
values from the old selector. Map the old intrinsic calls to the new
landingpad values (there may be multiple landingpad instructions per instrinic
call pairs).
* Go through the old intrinsic calls, create a PHI node when necessary, and then
replace their values with the new values from the landingpad instructions.
* Delete all dead instructions.
* ???
* Profit!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138990 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02 01:30:08 +00:00
Owen Anderson
a1c110045a
Merge the ARM disassembler header into the implementation file, since it is not externally exposed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138982 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 23:35:51 +00:00
Owen Anderson
a6804444e8
Fix 80 columns violations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138980 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 23:23:50 +00:00
Dan Gohman
6b13cd4154
Revert r131152, r129796, r129761. This code is currently considered
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to be unreliable on platforms which require memcpy calls, and it is
complicating broader legalize cleanups. It is hoped that these cleanups
will make memcpy byval easier to implement in the future.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138977 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 23:07:08 +00:00
Benjamin Kramer
36a16015ac
Don't drop alignment info on local common symbols.
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- On COFF the .lcomm directive has an alignment argument.
- On ELF we fall back to .local + .comm
Based on a patch by NAKAMURA Takumi.
Fixes PR9337, PR9483 and PR10128.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138976 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 23:04:27 +00:00
Eli Friedman
7df496d2ad
Null-initialize to shut up -Wuninitialized warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138974 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 22:27:41 +00:00
James Molloy
ee06443945
Fix apparent build error caused by r138948 on certain versions of GCC with -Werror. Sorry for the inconvenience.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138973 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 22:01:14 +00:00
Bill Wendling
6bb4e7e8e8
Reduce indentation. No functionality change.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138968 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 21:29:49 +00:00
Bill Wendling
c8c0fd3993
Change worklist driven deletion to be an iterative process.
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Duncan noticed this!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138967 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 21:28:33 +00:00
Eli Friedman
86b5db8c01
Fix an issue with the IR sink pass found by inspection. (I'm not sure anyone is actually using this, but might as well fix it since I found the issue.)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138965 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 21:21:24 +00:00
Nick Lewycky
833a003da0
Fix the build for us -Werror users.
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Remove broken emacs mode major notation marking a C++ file as C.
No functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138963 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 21:09:04 +00:00
Eli Friedman
81b4e434d9
Make isSafeToSpeculativelyExecute() return the right answer for some new instructions. Found by inspection; not sure what practical impact, if any, this has.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138962 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 21:03:03 +00:00
Jakob Stoklund Olesen
4a0a18af4a
Permit remat of partial register defs when it is safe.
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An instruction may define part of a register where the other bits are
undefined. In that case, it is safe to rematerialize the instruction.
For example:
%vreg2:ssub_0<def> = VLDRS <cp#0>, 0, pred:14, pred:%noreg, %vreg2<imp-def>
The extra <imp-def> operand indicates that the instruction does not read
the other parts of the virtual register, so a remat is safe.
This patch simply allows multiple def operands for the virtual register.
It is MI->readsVirtualRegister() that determines if we depend on a
previous value so remat is impossible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138953 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 18:27:51 +00:00
Jim Grosbach
2f25d9b933
ARM 'rscs' mnemonic is carry-setting 'rsc', not 'rs' with a 'cs' condition code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138952 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 18:22:13 +00:00
Bruno Cardoso Lopes
a39ccdb9d4
Fix vbroadcast matching logic to early unmatch if the node doesn't have
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only one use. Fix PR10825.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138951 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 18:15:06 +00:00
James Molloy
c047dcade5
Fix up r137380 based on post-commit review by Jim Grosbach.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138948 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 18:02:14 +00:00
Owen Anderson
7f17b5a483
t2Bcc is allowed to have a predicate without a preceding IT instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138946 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 17:47:45 +00:00
Jakob Stoklund Olesen
ae779eea27
Revert r138794, "Do not try to rematerialize a value from a partial definition."
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The problem is fixed for all register allocators by r138944, so this
patch is no longer necessary.
<rdar://problem/10032939>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138945 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 17:25:18 +00:00
Jakob Stoklund Olesen
9d548d0343
Prevent remat of partial register redefinitions.
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An instruction that redefines only part of a larger register can never
be rematerialized since the virtual register value depends on the old
value in other parts of the register.
This was fixed for the inline spiller in r138794. This patch fixes the
problem for all register allocators, and includes a small test case.
<rdar://problem/10032939>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138944 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 17:18:50 +00:00
Evan Cheng
61560e205a
Teach MachineLICM reg pressure tracking code to deal with MVT::untyped. Sorry, I can't come up with a small test case. rdar://10043690
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138934 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 01:45:00 +00:00
Bill Wendling
a8d1393093
Resubmit with fix. Properly remove the instructions except for landingpad, which should be removed only when its invokes are.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138932 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 01:28:11 +00:00
Bill Wendling
c1b4cd6c11
Submitted this too early.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138931 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 01:18:33 +00:00
Bill Wendling
1893cd3131
Don't DCE the landingpad instruction.
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The landingpad instruction can be removed only when its invokes are removed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138930 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 01:16:58 +00:00
Andrew Trick
340d78f4e7
PreRA scheduler should avoid cloning compares.
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Added canClobberReachingPhysRegUse() to handle a particular pattern in
which a two-address instruction could be forced to interfere with
EFLAGS, causing a compare to be unnecessarilly cloned.
Fixes rdar://problem/5875261
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138924 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 00:54:31 +00:00
Bill Wendling
35726bfcaa
Don't forget to add the landingpad and resume instructions to the InstructionList.
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This was found via a nightly build of 483.xalancbmk.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138923 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 00:50:20 +00:00
Jim Grosbach
20ed2e7939
Thumb2 assembly parsing and encoding for ADD(immediate).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138922 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-01 00:28:52 +00:00
Chad Rosier
dd1e7517b5
Fixup for functions that return a bool.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138918 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 23:49:05 +00:00
Jim Grosbach
de98273189
Static relocation model Thumb jump table interworking.
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Make sure the low bit of the PC is set when loading an address directly
for jump tables in static relocation model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138912 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 22:23:09 +00:00
Owen Anderson
b45b11bce1
The asm parser currently selects the wrong encoding for non-conditional Thumb2 branches. However, this exposed a number of situations where the decoder was too permissive in allowing invalid instructions to decode successful. Specify additional fixed bits to close those gaps.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138910 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 22:00:41 +00:00
David Greene
94fca8300d
Fix Size Typing
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Stores sizes as uint64_t to avoid possible truncation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138901 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 21:34:20 +00:00
Jim Grosbach
c075510e43
Thumb2 t2Bcc should encode as t2B when condition is 'always'.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138898 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 21:17:31 +00:00
Bruno Cardoso Lopes
fc7bc5889b
Move more code around and duplicate AVX patterns: MOVHPS and MOVLPS
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138897 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 21:15:32 +00:00
Bruno Cardoso Lopes
06c982d0e0
Move MOVAPS,MOVUPS patterns close to the instructions definition
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138896 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 21:15:29 +00:00
Bruno Cardoso Lopes
453f4954f2
Remove "_Int" forms of MOVUPSmr and MOVAPSmr
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138895 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 21:15:22 +00:00
Bill Wendling
4f8aaa0928
Make sure we aren't deleting the landingpad instruction.
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The landingpad instruction is required in the landing pad block. Because we're
not deleting terminating instructions, the invoke may still jump to here (see
Transforms/SCCP/2004-11-16-DeadInvoke.ll). Remove all uses of the landingpad
instruction, but keep it around until code-gen can remove the basic block.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138890 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 20:55:20 +00:00
Owen Anderson
721cb1fde0
Fix encoding for tBcc with immediate offset operand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138889 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 20:26:14 +00:00
Eli Friedman
fcd75e5efb
Misc cleanup; addresses Duncan's comments on r138877.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138887 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 20:13:26 +00:00
Owen Anderson
d84192fe4f
When performing instruction selection for LDR_PRE_IMM/LDRB_PRE_IMM, we still need to preserve the sign of the index. This fixes miscompilations of Quicksort in the nightly testsuite, and hopefully others as well.
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<rdar://problem/10046188>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138885 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 20:00:11 +00:00
Jim Grosbach
b80ab8e369
Remove FIXME. Thumb2 MOV instruction will use separate custom tricks.
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When we want encoding T3 (the wide encoding), we can explicitly check for
that and twiddle the CanAcceptCarrySet accordingly. For now, just correctly
handle encodings T1 and T2 when in Thumb2 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138879 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 18:39:39 +00:00
Eli Friedman
62bb16cfd1
Fill in type legalization for MERGE_VALUES in all the various cases. Patch by Micah Villmow. (No testcase because the issue only showed up in an out-of-tree backend.)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138877 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 18:36:04 +00:00
Owen Anderson
559c277aa9
Fix roundtripping of Thumb BL/BLX instructions with immediate offsets instead of labels.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138874 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 18:30:20 +00:00
Jim Grosbach
c9a9b44285
tBcc is OK to be predicated in Thumb2 outside of IT blocks (obviously).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138873 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 18:29:05 +00:00
Eli Friedman
ba567d670d
Generic expansion for atomic load/store into cmpxchg/atomicrmw xchg; implements 64-bit atomic load/store for ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138872 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 18:26:09 +00:00
Jim Grosbach
72335d55d9
Thumb2 parsing and encoding for ADC(register).
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Also add instruction aliases for non-.w versions of SBC since they're the
same.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138871 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 18:23:08 +00:00
Devang Patel
b71541a2db
After r138010, subroutine type does not have context info. Update type verifier accordingly.
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This fixes ptype.exp gdb testsuite regressions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138869 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 18:04:31 +00:00
Eli Friedman
4d3f329453
64-bit atomic cmpxchg for ARM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138868 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 17:52:22 +00:00
Akira Hatanaka
334b5305a6
Fix typo. Patch by Liu.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138866 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 17:49:04 +00:00
David Greene
d92e2e4f88
Compress Repeated Byte Output
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Emit a repeated sequence of bytes using .zero. This saves an enormous
amount of asm file space for certain programs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138864 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 17:30:56 +00:00
Jim Grosbach
0f3abd8d68
Tweak Thumb1 ADD encoding selection a bit.
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When the destination register of an add immediate instruction is
explicitly specified, encoding T1 is preferred, else encoding T2 is
preferred.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138862 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 17:07:33 +00:00
Jakob Stoklund Olesen
6154582983
Put VMOVS widening under a command line option, off by default.
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It appears that our use of the imp-use and imp-def flags with
sub-registers is not yet robust enough to support this.
The failing test case is complicated, I am working on a reduction.
<rdar://problem/10044201>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138861 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 17:00:02 +00:00
Rafael Espindola
e81abfd30b
Spelling and grammar fixes to problems found by Duncan.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138858 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 16:43:33 +00:00
Eli Friedman
ac86d43eae
Make sure we don't crash when -miphoneos-version-min is specified on x86. Hopefully this will fix gcc testsuite failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138856 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 16:19:51 +00:00
Eric Christopher
c967ad8c88
Rework this conditional a bit.
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Patch by Sanjoy Das
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138853 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 04:17:21 +00:00
Bruno Cardoso Lopes
57d6a5e491
- Move all MOVSS and MOVSD patterns close to their definitions
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- Duplicate some store patterns to their AVX forms!
- Catched a bug while restricting the patterns subtarget, fix it
and update a testcase to check it properly
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138851 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 03:04:20 +00:00
Bruno Cardoso Lopes
fc646a6b06
Remove unnecessary AVX checks
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138850 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 03:04:14 +00:00
Bruno Cardoso Lopes
5affa5196f
Teach more places to use VMOVAPS,VMOVUPS instead of MOVAPS,MOVUPS,
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whenever AVX is enabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138849 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 03:04:09 +00:00
Evan Cheng
0899f5c62d
Fix (movhps load) lowering / pattern to match more cases. rdar://10050549
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138848 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 02:05:24 +00:00
Eli Friedman
3d93861c23
Some minor cleanups for r138845.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138846 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 00:41:05 +00:00
Eli Friedman
2bdffe4882
Some 64-bit atomic operations on ARM. 64-bit cmpxchg coming next.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138845 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-31 00:31:29 +00:00
Rafael Espindola
f940a1a869
Remove the old tail duplication pass. It is not used and is unable to update
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ssa, so it has to be run really early in the pipeline. Any replacement
should probably use the SSAUpdater.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138841 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 23:03:45 +00:00
Owen Anderson
eaca928a37
Fix issues with disassembly of IT instructions involving condition codes other the EQ/NE. Discovered by roundtrip testing.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138840 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 22:58:27 +00:00
Owen Anderson
21df36c57a
Fix encoding of CBZ/CBNZ Thumb2 instructions with immediate offsets rather than labels.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138837 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 22:15:17 +00:00
Benjamin Kramer
d4522460d4
Teach macho-dump to dump the uleb128s referred to by linkedit_data segments.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138836 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 22:10:58 +00:00
Owen Anderson
a7710edd98
Fix encoding of PC-relative Thumb1 LDR's when using immediate offsets instead of labels.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138835 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 22:10:03 +00:00
Owen Anderson
391ac65377
Fix encoding of Thumb1 B instructions with immediate offsets, which is necessary for round-tripping.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138834 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 22:03:20 +00:00
Owen Anderson
10096dbdef
Clean up whitespace.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138833 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 21:58:18 +00:00
Bill Wendling
e716124feb
Fix off-by-one error Benjamin noticed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138832 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 21:23:24 +00:00
Owen Anderson
54c4735db3
Speculatively revert r138809 in an attempt to fix DragonEgg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138829 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 21:11:06 +00:00
Bill Wendling
011a8e1684
Enable compact unwind info by default. This only applies to Darwin when CFI is
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disabled.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138826 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 20:54:11 +00:00
Jeffrey Yasskin
cda2a146d1
Fix C++0x narrowing errors when char is unsigned.
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In the case of EDInstInfo, this would actually cause a bug when -1 became 255
and was then compared >=0 in llvm-mc/Disassembler.cpp.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138825 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 20:53:29 +00:00
Rafael Espindola
151ab3e2f7
Adds support for variable sized allocas. For a variable sized alloca,
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code is inserted to first check if the current stacklet has enough
space. If so, space is allocated by simply decrementing the stack
pointer. Otherwise a runtime routine (__morestack_allocate_stack_space
in libgcc) is called which allocates the required memory from the
heap.
Patch by Sanjoy Das.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138818 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 19:47:04 +00:00
Rafael Espindola
d07b7ec772
Adds a SelectionDAG node X86SegAlloca which will be custom lowered
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from DYNAMIC_STACKALLOC.
Two new pseudo instructions (SEG_ALLOCA_32 and SEG_ALLOCA_64) which
will match X86SegAlloca (based on word size) are also added. They
will be custom emitted to inject the actual stack handling code.
Patch by Sanjoy Das.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138814 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 19:43:21 +00:00
Rafael Espindola
76927d7586
Emit segmented-stack specific code into function prologues for
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X86. Modify the pass added in the previous patch to call this new
code.
This new prologues generated will call a libgcc routine (__morestack)
to allocate more stack space from the heap when required
Patch by Sanjoy Das.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138812 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 19:39:58 +00:00
Rafael Espindola
0f9827cd94
Command line option to enable support for segmented stacks:
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-segmented-stacks.
Patch by Sanjoy Das!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138811 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 19:29:02 +00:00
Evan Cheng
37fefc20d3
Follow up to r138791.
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Add a instruction flag: hasPostISelHook which tells the pre-RA scheduler to
call a target hook to adjust the instruction. For ARM, this is used to
adjust instructions which may be setting the 's' flag. ADC, SBC, RSB, and RSC
instructions have implicit def of CPSR (required since it now uses CPSR physical
register dependency rather than "glue"). If the carry flag is used, then the
target hook will *fill in* the optional operand with CPSR. Otherwise, the hook
will remove the CPSR implicit def from the MachineInstr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138810 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 19:09:48 +00:00
Owen Anderson
6e4be237b0
When walking backwards to eliminate final stores to allocas at the end of a function, encountering an unrelated store should not cause us to give up like encountering a load does.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138809 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 18:51:55 +00:00
Benjamin Kramer
9942acab0a
Teach macho-dump how to dump linkedit_data load commands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138807 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 18:33:37 +00:00
Roman Divacky
0aaa9195b5
Set CR1EQ only when lowering vararg floating arguments (not any vararg
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arguments as before), unset CR1EQ otherwise.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138802 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 17:04:16 +00:00
James Molloy
e7815c22fc
Fix typos in SPUMCTargetDesc.h
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Patch supplied by Liu (projlc@gmail.com )
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138799 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 07:27:02 +00:00
James Molloy
7e14b240a8
Fix typo in BlackfinFrameLowering.h
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Patch supplied by Liu (projlc@gmail.com )
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138798 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 07:26:11 +00:00
James Molloy
4d8af4ee6e
Fix typo in MSP430MCTargetDesc.h.
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Patch supplied by Liu (projlc@gmail.com )
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138797 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 07:24:47 +00:00
James Molloy
afaf80a13b
Fix typo in MipsMCTargetDesc.h; Patch supplied by Liu (proljc@gmail.com)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138796 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 07:23:29 +00:00
Bob Wilson
e497906e87
Do not try to rematerialize a value from a partial definition.
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I don't currently have a good testcase for this; will try to get one
tomorrow. <rdar://problem/10032939>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138794 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 05:36:02 +00:00
Evan Cheng
342e3161d9
Change ARM / Thumb2 addc / adde and subc / sube modeling to use physical
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register dependency (rather than glue them together). This is general
goodness as it gives scheduler more freedom. However it is motivated by
a nasty bug in isel.
When a i64 sub is expanded to subc + sube.
libcall #1
\
\ subc
\ / \
\ / \
\ / libcall #2
sube
If the libcalls are not serialized (i.e. both have chains which are dag
entry), legalizer can serialize them in arbitrary orders. If it's
unlucky, it can force libcall #2 before libcall #1 in the above case.
subc
|
libcall #2
|
libcall #1
|
sube
However since subc and sube are "glued" together, this ends up being a
cycle when the scheduler combine subc and sube as a single scheduling
unit.
The right solution is to fix LegalizeType too chains the libcalls together.
However, LegalizeType is not processing nodes in order so that's harder than
it should be. For now, the move to physical register dependency will do.
rdar://10019576
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138791 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30 01:34:54 +00:00
Jim Grosbach
d3765189bf
Revert 138781. It's not playing nicely with the immediate forms for ADC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138782 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 23:24:15 +00:00
Jim Grosbach
e94a5b1218
Thumb2 assembler aliases for ADC/SBC w/o the .w suffix.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138781 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 23:20:54 +00:00
Owen Anderson
694e0ffb8a
Add missing encoding information for some of the GPR<->FP register moves.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138780 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 23:15:25 +00:00
Jim Grosbach
f8e1e3e729
Thumb2 parsing and encoding for IT blocks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138773 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 22:24:09 +00:00
Eli Friedman
f3704769bb
Explicitly zero out parts of a vector which are required to be zero by the algorithm in LowerUINT_TO_FP_i32. This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly. Fixes PR10802.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138768 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 21:15:46 +00:00
Owen Anderson
acb274baac
Apply the same fix for the change in LDR_PRE_IMM/LDRB_PRE_IMM operand encodings to the load-store optimizer that I applied to the instruction selector in r138758. Fixes ary3 from the nightly test suite.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138766 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 21:14:19 +00:00
Bill Wendling
8e5cf90923
Fix grammar, noticed by Duncan.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138764 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 21:03:12 +00:00
Owen Anderson
1f26758510
Specify an additional fixed bit in the PLD/PLDW/PLI register-register encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138760 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 20:42:00 +00:00
Owen Anderson
c4e16de765
addrmode_imm12 and addrmode2_offset encode their immediate values differently. Update the manual instruction selection code that was encoding them the addrmode2 way even though LDR_PRE_IMM/LDRB_PRE_IMM had switched to addrmode_imm12. Should fix a number of nightly test failures.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138758 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 20:16:50 +00:00
Nadav Rotem
89879ec76b
Fixes following the CR by Chris and Duncan:
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Optimize chained bitcasts of the form A->B->A.
Undo r138722 and change isEliminableCastPair to allow this case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138756 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 19:58:36 +00:00
Owen Anderson
0da10cf44d
Improve handling of #-0 offsets for many more pre-indexed addressing modes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138754 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 19:36:44 +00:00
Bill Wendling
98ba358fdb
Initialize CompactUnwindSection so that other targets won't use an uninitialized value.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138752 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 18:25:59 +00:00
Eli Friedman
4db5acaf48
Expand ATOMIC_LOAD and ATOMIC_STORE for architectures I don't know well enough to fix properly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138751 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 18:23:02 +00:00
Benjamin Kramer
3dedf7e2c8
Dump with dbgs() instead of printf.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138749 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 18:14:17 +00:00
Benjamin Kramer
4a3d0a56eb
Make GCC happy by adding parens.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138748 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 18:14:15 +00:00
Owen Anderson
07700d486e
Update the load-store optimizer for changes to the operands on LDR_PRE_IMM and LDRB_PRE_IMM in r138653.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138746 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 17:59:41 +00:00
Bruno Cardoso Lopes
41dfabb0e3
Move non-intruction patterns to a more appropriate place!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138744 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 17:51:24 +00:00
Owen Anderson
63553c77cd
Add support for parsing #-0 on non-memory-operand immediate values, and add a testcase that necessitates it.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138739 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 17:17:09 +00:00
Andrew Trick
0e122d1c24
Reapply r138695. Fix PassManager stack depths.
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Patch by Xiaoyi Guo!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138737 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 17:07:00 +00:00
Tobias Grosser
05d7138018
Add AMDIL as valid target triple to LLVM.
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Submitted by: Villmow, Micah <Micah.Villmow@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138734 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29 15:44:55 +00:00
Nicolas Geoffray
1c36ba50ac
Remove premature previous commit.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138725 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-28 14:52:51 +00:00
Duncan Sands
fd9c4f76f4
Fix PR5329: pay attention to constructor/destructor priority
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when outputting them. With this, the entire LLVM testsuite
passes when built with dragonegg.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138724 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-28 13:17:22 +00:00
Nicolas Geoffray
c98da24bed
Encoding of instructions referencing segments has changed. Do what X86MCCodeEmitter does.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138723 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-28 13:07:57 +00:00
Nadav Rotem
be6ceb6ebc
Bitcasts are transitive. Bitcast-Bitcast-X becomes Bitcast-X.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138722 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-28 11:51:08 +00:00
Nick Lewycky
b1b051ec97
Fix integer overflow bug in raw_ostream::write. This showed up as a
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non-deterministic crash in the test suite. Fixes PR10055!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138717 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-28 03:30:02 +00:00
Benjamin Kramer
2753ae314f
Silence GCC warnings and make an array const.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138706 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-27 17:36:14 +00:00
Benjamin Kramer
f66f76c1a3
Report failure if there are less bytes than requested in a MemoryObject.
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Before we just left the remaining bytes uninitialized. This is another step in making llvm valgrind-clean again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138705 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-27 07:45:46 +00:00
Bill Wendling
df77a71790
Auto upgrade the old EH scheme to use the new one. This is on a trial basis. If
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things to disasterously over night, this can be reverted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138702 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-27 06:11:03 +00:00
Andrew Trick
8592a0cda4
Reverting r138695 to see if it fixes clang self host.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138701 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-27 06:10:16 +00:00
Bill Wendling
884fb72f15
Only delete instructions once.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138700 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-27 06:10:02 +00:00
Bill Wendling
8557e6c0c1
These splits should be done whether they are critical edges or not.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138697 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-27 04:40:37 +00:00
Andrew Trick
b846192230
Fix PassManager stack depths.
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Patch by Xiaoyi Guo!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138695 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-27 02:11:03 +00:00
Owen Anderson
f1eab597b2
Improve encoding support for BLX with immediat eoperands, and fix a BLX decoding bug this uncovered.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138675 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 23:32:08 +00:00
Owen Anderson
d7568e1c35
Correct encoding of BL with immediate offset.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138673 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 22:54:51 +00:00
Jim Grosbach
4af54a461f
ARM assembly parsing tweak for pldw.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138669 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 22:21:51 +00:00
Owen Anderson
9f7e831994
Spelling fail.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138667 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 21:47:57 +00:00
Jim Grosbach
89df996ab2
Thumb2 assembler parsing and encoding of IT instruction.
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This handles only the handling of the IT instruction itself, not the
processing and validation of the instructions in the IT block. That's next,
and will include encoding tests for IT itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138665 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 21:43:41 +00:00
Bill Wendling
e8ef4cc053
Update the dominator tree with the correct dominator for the new 'unwind' block.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138664 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 21:36:12 +00:00
Eli Friedman
43f51aeca8
Add support for generating CMPXCHG16B on x86-64 for the cmpxchg IR instruction.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138660 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 21:21:21 +00:00
Bill Wendling
51fb91c04c
Split the landing pad block only if it's a critical edge. Also intelligently
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split it in the other place where we're splitting critical edges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138658 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 21:18:55 +00:00
Owen Anderson
2b568fb3ce
Fix ARM codegen breakage caused by r138653.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138657 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 21:12:37 +00:00
Eric Christopher
6c0046f5d4
Whitespace and 80-col.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138654 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 21:02:40 +00:00
Owen Anderson
9ab0f25fc1
invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons. We were failing to specify enough fixed bits of LDR_PRE/LDRB_PRE, resulting in decoding conflicts. Separate them into immediate vs. register versions, allowing us to specify the necessary fixed bits. This in turn results in the test being decoded properly, and being rejected as UNPREDICTABLE rather than a hard failure.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138653 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 20:43:14 +00:00
Bill Wendling
2b18881185
Don't sink landingpad instructions during ind-var simplification.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138651 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 20:40:15 +00:00
Owen Anderson
1af7f7291d
Update for feedback from Jim.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138642 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 19:39:26 +00:00
Benjamin Kramer
86ce852a15
ARMDisassembler: Always return a size, even when disassembling fails.
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This should fix PR10772.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138636 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 18:21:36 +00:00
Owen Anderson
96425c8464
Support an extension of ARM asm syntax to allow immediate operands to ADR instructions. This is helpful for disassembler testing, and indeed exposed a disassembler bug that is also fixed here.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138635 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 18:09:22 +00:00
Kalle Raiskila
54f8a9f54d
Don't insert branch hint lables that are never used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138630 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 10:14:56 +00:00
Owen Anderson
9bd655dcde
Fix PR10755 by checking for invalid predicate codes from UNPREDICTABLE t2IT instructions when decoding their successors.
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This is the last disassembly crash detected by exhaustive Thumb2 instruction space. Major thanks to Chandler Carruth for making this kind of exhaustive testing possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138625 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 06:19:51 +00:00
Craig Topper
8fd13b6de5
Fix disassembling of VCVTSD2SI
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138623 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 04:49:29 +00:00
Andrew Trick
5434c1e73b
LoopInfo::updateUnloop fix, and verify Block->Loop maps.
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Fixes an oversight, and adds verification to catch it in the unloop.ll tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138622 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 03:06:34 +00:00
Eli Friedman
069e2ed794
Atomic load/store on ARM/Thumb.
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I don't really like the patterns, but I'm having trouble coming up with a
better way to handle them.
I plan on making other targets use the same legalization
ARM-without-memory-barriers is using... it's not especially efficient, but
if anyone cares, it's not that hard to fix for a given target if there's
some better lowering.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138621 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 02:59:24 +00:00
Benjamin Kramer
9bb5488dbd
Address review comments.
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- Reword comments.
- Allow undefined behavior interfering with undefined behavior.
- Add address space checks.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138619 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 02:25:55 +00:00
Benjamin Kramer
98d6d2372f
SimplifyCFG: If we have a PHI node that can evaluate to NULL and do a load or store to the address returned by the PHI node then we can consider this incoming value as dead and remove the edge pointing there, unless there are instructions that can affect control flow executed in between.
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In theory this could be extended to other instructions, eg. division by zero, but it's likely that it will "miscompile" some code because people depend on div by zero not trapping. NULL pointer dereference usually leads to a crash so we should be on the safe side.
This shrinks the size of a Release clang by 16k on x86_64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138618 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26 01:22:29 +00:00
Bill Wendling
09908c4b4a
Look at only the terminators of the basic block. Also, if we're using the new EH
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scheme, return 'true' so that it doesn't try to run the old EH scheme's fixup on
the new code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138605 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 23:48:11 +00:00
Bill Wendling
c82a61c6c6
Initial check in that will auto-upgrade the old EH scheme to the new EH scheme.
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This upgrade suffers from the problems of the old EH scheme - i.e., that the
calls to llvm.eh.exception() and llvm.eh.selector() can wander off and get
lost. It makes a valiant effort to reclaim these little lost lambs.
This is a first draft, so it hasn't yet been hooked up to the parser.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138602 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 23:22:40 +00:00
Bruno Cardoso Lopes
f1a264232c
Do the same as r138461. Mark VZEROALL as clobbering all YMM registers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138592 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 22:23:58 +00:00
Nick Lewycky
b210cbf692
Remove stray fullstop.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138589 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 21:46:20 +00:00
Bruno Cardoso Lopes
6292eceea0
Add support for AVX 256-bit version of MOVDDUP!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138588 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 21:40:37 +00:00
Bruno Cardoso Lopes
06ef923d14
Make isMOVDDUP mask check more strict and update comments!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138587 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 21:40:34 +00:00
Owen Anderson
99906830e8
Port over additional encoding tests to decoding tests, and fix an operand ordering bug this exposed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138575 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 18:30:18 +00:00
Benjamin Kramer
cf847bfa6f
Intel family 6 model 44 is Gulftown/Westmere-EP and doesn't have AVX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138573 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 18:05:56 +00:00
Andrew Trick
b9ca5124f8
ARM fix for missing implicit operands on ldmia_ret.
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rdar://10005094: miscompile of 176.gcc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138568 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 17:50:53 +00:00
Andrew Trick
51972da576
whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138566 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 17:40:54 +00:00
Jim Grosbach
0c49ac05cd
Explicitly disallow predication in Thumb1 assembly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138562 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 17:23:55 +00:00
Craig Topper
ebc1db0fac
Add more missing TB encodings to VEX instructions to allow them to be disassembled. Fixes remainder of PR10678.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138553 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 08:11:01 +00:00
Craig Topper
ea03659d23
Add TB encoding to VEROALL, VZEROUPPER, and VCVTPS2PD to allow them to be disassembled. Fixes PR10723.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138551 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 06:57:46 +00:00
Bill Wendling
8b6af8a2a9
LSR wants to split the landing pad's critical edge. Let it do it, but use the
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proper function to do it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138550 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 05:55:40 +00:00
Benjamin Kramer
2df9f8df95
Initialize member variable.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138548 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 04:04:18 +00:00
Bruno Cardoso Lopes
07b7f672a0
Add support for 256-bit versions of VSHUFPD and VSHUFPS.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138546 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 02:58:26 +00:00
Bruno Cardoso Lopes
e7461c0353
Add memory version of SHUFPD to mask decoding!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138545 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 02:58:21 +00:00
Evan Cheng
77eaaf0a0c
Hide -global-merge option.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138540 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 01:22:49 +00:00
Bill Wendling
89d4411cef
When inserting new instructions, use getFirstInsertionPt instead of
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getFirstNonPHI so that it will skip over the landingpad instructions as well.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138537 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 01:08:34 +00:00
Evan Cheng
b8cfe4ff41
Add a command line option to disable global merge pass.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138536 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 01:00:36 +00:00
Evan Cheng
0f660260e6
Remove a out-of-place comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138534 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25 00:54:42 +00:00
Bruno Cardoso Lopes
27831e5e6f
Create a section for non-instructions patterns in the beginning of the
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file, and move more code around!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138521 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 23:18:11 +00:00
Bruno Cardoso Lopes
9993499057
Move code around!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138520 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 23:18:09 +00:00
Bruno Cardoso Lopes
de79231468
Organize UNPCK* patterns, also add remaining for AVX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138519 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 23:18:06 +00:00
Bruno Cardoso Lopes
4cf4778ac4
Move remaining MOVDDUP patterns close to MOVDDUP defintion and duplicate
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the missing ones for AVX.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138518 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24 23:18:04 +00:00