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f06ff4eae3
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18793 Commits

Author SHA1 Message Date
Eli Friedman
f06ff4eae3 Default 64-bit target features and SSE2 on when a triple specifies x86-64. Clean up all the other hacks which are now unnecessary. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134753 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 22:16:47 +00:00
Jim Grosbach
25e6d48220 Make tBX_RET and tBX_RET_vararg predicable. 
The normal tBX instruction is predicable, so there's no reason the
pseudos for using it as a return shouldn't be. Gives us some nice code-gen
improvements as can be seen by the test changes. In particular, several
tests now have to disable if-conversion because it works too well and defeats
the test.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134746 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 21:50:04 +00:00
Julien Lerouge
f29608267b Add _allrem, _aullrem and _allmul to the runtime for MSVC. 
http://llvm.org/bugs/show_bug.cgi?id=10305


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134744 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 21:40:25 +00:00
Cameron Zwarich
33390848a7 Add an intrinsic and codegen support for fused multiply-accumulate. The intent 
is to use this for architectures that have a native FMA instruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134742 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 21:39:21 +00:00
Evan Cheng
cc0ddc707d For non-x86 host, used generic as CPU name. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134741 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 21:14:14 +00:00
Jim Grosbach
d28ec08edd Pseudo-ize tBX_RET and tBX_RET_vararg. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134739 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 21:10:35 +00:00
Benjamin Kramer
75ca4b94bd Plug a leak by giving the AsmParser ownership of the MCSubtargetInfo. 
Found by valgrind.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134738 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 21:06:23 +00:00
Jim Grosbach
ead77cd678 Shuffle productions around a bit. 
No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134737 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 21:04:05 +00:00
Jim Grosbach
0b44aea7b5 Use tPseudoExpand for tTAILJMPrND and tTAILJMPr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134734 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 20:39:19 +00:00
Jim Grosbach
af7f2d6b67 Use tPseudoExpand for tTAILJMPd and tTAILJMPdND. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134732 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 20:32:21 +00:00
Benjamin Kramer
70629abe31 Silence compiler warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134730 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 20:18:13 +00:00
Jim Grosbach
8dc41f33f7 Add more info to FIXME. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134729 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 20:18:11 +00:00
Jim Grosbach
e36e21e830 Move Thumb tail call pseudos to Thumb.td file. 
Fix a FIXME.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134727 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 20:13:35 +00:00
Evan Cheng
480cee5d43 TargetAsmParser doesn't need reference to Target. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134721 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 19:33:14 +00:00
Jim Grosbach
245f5e8e2a Use ARMPseudoExpand for ARM tail calls. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134719 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 18:50:22 +00:00
Jim Grosbach
9ca2a778b6 Shuffle productions around a bit. 
No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134714 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 18:26:27 +00:00
Jim Grosbach
4559a7bcfd Use ARMPseudoExpand for BLr9, BLr9_pred, BXr9, and BXr9_pred. 
TableGen'erated MC lowering pseudo-expansion.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134712 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 18:15:12 +00:00
Chandler Carruth
549a85138c Add CMake support for the new TableGen file introduced in r134705. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134707 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 17:54:08 +00:00
Jim Grosbach
53e3fc463e Use TableGen'erated pseudo lowering for ARM. 
Hook up the TableGen lowering for simple pseudo instructions for ARM and
use it for a subset of the many pseudos the backend has as proof of concept.

More conversions to come.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134705 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 17:40:42 +00:00
Evan Cheng
ebdeeab812 Eliminate asm parser's dependency on TargetMachine: 
- Each target asm parser now creates its own MCSubtatgetInfo (if needed).
- Changed AssemblerPredicate to take subtarget features which tablegen uses
  to generate asm matcher subtarget feature queries. e.g.
  "ModeThumb,FeatureThumb2" is translated to
  "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134678 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 01:53:10 +00:00
Akira Hatanaka
0184336195 Raise assertion when MachineOperand has unexpected target flag. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134671 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 00:42:35 +00:00
Akira Hatanaka
18dfcb8a28 Make sure variable Kind is assigned a value to suppress warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134668 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 00:26:25 +00:00
Nick Lewycky
9bf45d0b1a Let the inline asm 'q' constraint match float, and on 64-bit double too. 
Fixes PR9602!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134665 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 00:19:27 +00:00
Eric Christopher
77ed1353bf Go ahead and emit the barrier on x86-64 even without sse2. The 
processor supports it just fine.

Fixes PR9675 and rdar://9740801


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134664 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-08 00:04:56 +00:00
Akira Hatanaka
794bf17cbe Lower MachineInstr to MC Inst and print to .s files. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134661 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 23:56:50 +00:00
Eric Christopher
d8cca66bb4 Handle fpcr register. 
Part of PR10299 and rdar://9740322

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134653 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 22:54:12 +00:00
Eric Christopher
31b5f00c4e Add support for the X86 'l' constraint. 
Fixes PR10149 and rdar://9738585

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134648 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 22:29:07 +00:00
Akira Hatanaka
78d62b2c7f Remove unnecessary newline. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134645 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 22:06:18 +00:00
Evan Cheng
18fb1d35db Add Mode64Bit feature and sink it down to MC layer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134641 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 21:06:52 +00:00
Bill Wendling
4ae970b393 Move a function out-of-line. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134640 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 21:05:13 +00:00
Akira Hatanaka
03236be44a Rather than having printMemOperand change the way memory operands are printed 
based on a modifier, split it into two functions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134637 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 20:54:20 +00:00
Akira Hatanaka
17a2f8e551 Define class MipsMCInstLower. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134633 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 20:24:54 +00:00
Akira Hatanaka
aa08ea0530 Change visibility of MipsAsmPrinter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134630 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 20:10:52 +00:00
Akira Hatanaka
2091a0d8d2 Define class MipsMCSymbolRefExpr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134629 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 19:27:22 +00:00
Akira Hatanaka
4d1abf1a38 Simplify MipsRegisterInfo::eliminateFrameIndex. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134628 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 19:13:09 +00:00
Evan Cheng
4761a8d654 Rewrite comment in English. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134627 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 19:09:06 +00:00
Evan Cheng
963b03c1a9 Rename attribute 'thumb' to a more descriptive 'thumb-mode'. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134626 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 19:05:12 +00:00
Akira Hatanaka
d3ac47f805 Reverse order of operands of address operand mem so that the base operand comes 
before the offset. This change will enable simplification of function
MipsRegisterInfo::eliminateFrameIndex.





git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134625 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 18:57:00 +00:00
Akira Hatanaka
e280519ba6 Add missing return statement. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134622 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 18:27:36 +00:00
Oscar Fuentes
a8504111f6 Update CMake library dependencies 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134616 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 16:33:00 +00:00
Douglas Gregor
7f358da70f Fix CMake build 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134614 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 15:59:22 +00:00
Cameron Zwarich
375db7f39a The VMLA instruction and its friends are not actually fused; they're plain old 
multiply-accumulate instructions with separate rounding steps.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134609 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 08:28:52 +00:00
Evan Cheng
db068738e8 Sink feature IsThumb into MC layer. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134608 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 08:26:46 +00:00
Evan Cheng
0ddff1b535 Compute feature bits at time of MCSubtargetInfo initialization. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134606 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 07:07:08 +00:00
Bill Wendling
b99e412650 Use ArrayRef instead of a std::vector&. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134595 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 04:42:01 +00:00
Evan Cheng
39dfb0ff84 Change some ARM subtarget features to be single bit yes/no in order to sink them down to MC layer. Also fix tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134590 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 03:55:05 +00:00
Bill Wendling
6a6b8c3e96 Add a target hook to encode the compact unwind information. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134577 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 00:54:13 +00:00
Evan Cheng
94ca42ff04 Factor ARM triple parsing out of ARMSubtarget. Another step towards making ARM subtarget info available to MC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134569 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-07 00:08:19 +00:00
Evan Cheng
78a9f138ae Add ARM MC registry routines. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134547 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 22:02:34 +00:00
Evan Cheng
ed5e355214 Rename files for consistency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134546 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-06 22:01:53 +00:00