Commit Graph

3200 Commits

Author SHA1 Message Date
Saleem Abdulrasool
7afe0000f6 ARM IAS: properly handle function entries in .thumb
When a label is parsed, check if there is type information available for the
label.  If so, check if the symbol is a function.  If the symbol is a function
and we are in thumb mode and no explicit thumb_func has been emitted, adjust the
symbol data to indicate that the function definition is a thumb function.

The application of this inferencing is improved value handling in the object
file (the required thumb bit is set on symbols which are thumb functions).  It
also helps improve compatibility with binutils.

The one complication that arises from this handling is the MCAsmStreamer.  The
default implementation of getOrCreateSymbolData in MCStreamer does not support
tracking the symbol data.  In order to support the semantics of thumb functions,
track symbol data in assembly streamer.  Although O(n) in number of labels in
the TU, this is already done in various other streamers and as such the memory
overhead is not a practical concern in this scenario.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204544 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-22 19:26:18 +00:00
Rafael Espindola
a60f719c8d Fix the value computation in
sym_a:
sym_d = sym_a + 1

This is the smallest fix I was able to extract from what got reverted in
r204203.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204527 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-21 22:00:29 +00:00
Rafael Espindola
3f687d350c Move codegen test over to MC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204490 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-21 17:55:34 +00:00
Rafael Espindola
6c22b041da Split out the MC part of this test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204481 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-21 17:16:11 +00:00
Richard Sandiford
6b6889d87b [SystemZ] Add support for z196 float<->unsigned conversions
These complement the older float<->signed instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204451 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-21 10:56:30 +00:00
Jiangning Liu
705e53e2aa This reverts commit r203762, "ARM: support emission of complex SO expressions".
The commit r203762 introduced silent failure for complext SO expression, and it's even worse than compiler crash.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204427 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-21 02:51:01 +00:00
Rafael Espindola
5b460ed4cd Convert a CodeGen test into a MC test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204421 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-21 00:55:42 +00:00
Rafael Espindola
aeb12e91d1 Convert another CodeGen test into a MC test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204412 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 23:35:00 +00:00
Greg Fitzgerald
aff0ab4e7c llvm-objdump output hex to match binutils' objdump
Patch by Ted Woodward

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204409 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 22:55:15 +00:00
Rafael Espindola
f59d05cf35 Convert CodeGen test into a more specific MC test.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204406 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 22:05:59 +00:00
Kai Nacke
ebf9f0c6cb [MIPS] Add cpu octeon and some instructions
The Octeon cpu from Cavium Networks is mips64r2 based and has an extended
instruction set. In order to utilize this with LLVM, a new cpu feature "octeon"
and a subtarget feature "cnmips" is added. A small set of new instructions
(baddu, dmul, pop, dpop, seq, sne) is also added. LLVM generates dmul, pop and
dpop instructions with option -mcpu=octeon or -mattr=+cnmips.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204337 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 11:51:58 +00:00
Zoran Jovanovic
37fb9b9591 Provide an operand for microMIPS wait instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204329 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 10:41:37 +00:00
Zoran Jovanovic
3ac3e7451b Implementation of microMIPS 16-bit instructions MOVE and JALR.
Differential Revision: http://llvm-reviews.chandlerc.com/D3112


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204325 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 10:18:24 +00:00
Zoran Jovanovic
b71fd20f2d Mark alias symbols as microMIPS if necessary. Differential Revision: http://llvm-reviews.chandlerc.com/D3080
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204323 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 09:44:49 +00:00
Craig Topper
6ee83c07a0 Test case for r204305.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204316 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 06:45:10 +00:00
Saleem Abdulrasool
9320b807aa Reapply 'ARM IAS: support .thumb_set'
Re-apply the change after it was reverted to do conflicts due to another change
being reverted.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204306 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 06:05:33 +00:00
Rafael Espindola
0a70f9b3b9 Look through variables when computing relocations.
Given

bar = foo + 4
	.long bar

MC would eat the 4. GNU as includes it in the relocation. The rule seems to be
that a variable that defines a symbol is used in the relocation and one that
does not define a symbol is evaluated and the result included in the relocation.

Fixing this unfortunately required some other changes:

* Since the variable is now evaluated, it would prevent the ELF writer from
  noticing the weakref marker the elf streamer uses. This patch then replaces
  that with a VariantKind in MCSymbolRefExpr.

* Using VariantKind then requires us to look past other VariantKind to see

	.weakref	bar,foo
	call	bar@PLT

  doing this also fixes

	zed = foo +2
	call zed@PLT

  so that is a good thing.

* Looking past VariantKind means that the relocation selection has to use
  the fixup instead of the target.

This is a reboot of the previous fixes for MC. I will watch the sanitizer
buildbot and wait for a build before adding back the previous fixes.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204294 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-20 02:12:01 +00:00
Matheus Almeida
947fa5b7b7 [mips] Making sure that a '.set noreorder' directive is correctly parsed
and emitted and that no NOPs are emitted in a 'noreorder section'.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204250 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-19 16:20:19 +00:00
Rafael Espindola
94ec09ae32 Make the test harder by using a non-zero offset.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204205 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-19 00:26:58 +00:00
Rafael Espindola
025e94d7dc Revert "Add back r203962, r204028 and r204059."
This reverts commit r204178.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204203 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-19 00:13:43 +00:00
NAKAMURA Takumi
2c4507e850 Move yet another test that requires ARM to an ARM test directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204198 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-18 23:12:09 +00:00
Jim Grosbach
ec8a8564f8 Move tests that require ARM to an ARM test directory.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204197 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-18 22:43:59 +00:00
Jim Grosbach
d55fc3f151 Darwin: Add assembler directives to create version-min load commands.
Allow object files to be tagged with a version-min load command for iOS
or MacOSX.

Teach macho-dump to understand the version-min load commands for
testcases.

rdar://11337778

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204190 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-18 22:09:05 +00:00
Rafael Espindola
4af106a677 Add back r203962, r204028 and r204059.
This reverts commit r204137.

This includes a fix for handling aliases of aliases.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204178 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-18 20:40:38 +00:00
Alexander Kornienko
8a99824c5a Revert r203962 and two revisions depending on it: r204028 and r204059.
The revision I'm reverting breaks handling of transitive aliases. This blocks us
and breaks sanitizer bootstrap:
http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-bootstrap/builds/2651
(and checked locally by Alexey).

This revision is the result of:

  svn merge -r204059:204058 -r204028:204027 -r203962:203961 .

+ the regression test added to test/MC/ELF/alias.s

Another way to reproduce the regression with clang:
  $ cat q.c
  void a1();
  void a2() __attribute__((alias("a1")));
  void a3() __attribute__((alias("a2")));
  void a1() {}

  $ ~/work/llvm-build/bin/clang-3.5-good -c q.c && mv q.o good.o && \
      ~/work/llvm-build/bin/clang-3.5-bad -c q.c && mv q.o bad.o && \
      objdump -t good.o bad.o

    good.o:     file format elf64-x86-64

    SYMBOL TABLE:
    0000000000000000 l    df *ABS*  0000000000000000 q.c
    0000000000000000 l    d  .text  0000000000000000 .text
    0000000000000000 l    d  .data  0000000000000000 .data
    0000000000000000 l    d  .bss   0000000000000000 .bss
    0000000000000000 l    d  .comment       0000000000000000 .comment
    0000000000000000 l    d  .note.GNU-stack        0000000000000000 .note.GNU-stack
    0000000000000000 l    d  .eh_frame      0000000000000000 .eh_frame
    0000000000000000 g     F .text  0000000000000006 a1
    0000000000000000 g     F .text  0000000000000006 a2
    0000000000000000 g     F .text  0000000000000006 a3



    bad.o:     file format elf64-x86-64

    SYMBOL TABLE:
    0000000000000000 l    df *ABS*  0000000000000000 q.c
    0000000000000000 l    d  .text  0000000000000000 .text
    0000000000000000 l    d  .data  0000000000000000 .data
    0000000000000000 l    d  .bss   0000000000000000 .bss
    0000000000000000 l    d  .comment       0000000000000000 .comment
    0000000000000000 l    d  .note.GNU-stack        0000000000000000 .note.GNU-stack
    0000000000000000 l    d  .eh_frame      0000000000000000 .eh_frame
    0000000000000000 g     F .text  0000000000000006 a1
    0000000000000000 g     F .text  0000000000000006 a2
    0000000000000000 g       .text  0000000000000000 a3




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204137 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-18 10:36:11 +00:00
Saleem Abdulrasool
5b5e5abd20 ARM IAS: support .thumb_set
This performs the equivalent of a .set directive in that it creates a symbol
which is an alias for another symbol or value which may possibly be yet
undefined.  This directive also has the added property in that it marks the
aliased symbol as being a thumb function entry point, in the same way that the
.thumb_func directive does.

The current implementation fails one test due to an unrelated issue.  Functions
within .thumb sections are not marked as thumb_func.  The result is that
the aliasee function is not valued correctly.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204059 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-17 17:13:54 +00:00
NAKAMURA Takumi
6e3aceffd3 llvm/test/MC/MachO/gen-dwarf-cpp.s: Relax an expression to match DOS pat.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204030 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-17 05:31:54 +00:00
Rafael Espindola
9fdf9d2a1e Consider the base pointer for setting the symbol type.
This is really a consistency fix. Since given

a = b

we propagate the information, we should propagate it too given

a = b + (1 - 1)

Fixes pr19145.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204028 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-17 04:29:51 +00:00
David Blaikie
fd69cf9ba4 DebugInfo: Improve reuse of file table entries in asm debug info
The previous deduping strategy was woefully inadequate - it only
considered the most recent file used and avoided emitting a duplicate in
that case - never considering the a/b/a scenario.

It was also lacking when it came to directory paths as the previous
filename would never match the current if the filename had been split
into file and directory components.

This change builds caching functionality into the line table at the
lowest level in an optional form (a file number of 0 indicates that one
should be chosen and returned) and will eventually be reused by the
normal source level debugging DWARF emission.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204027 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-17 01:52:11 +00:00
David Blaikie
6a6b6f50af Test case
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204026 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-17 01:52:04 +00:00
Rui Ueyama
7aa478d944 Object/COFF: change data type of SymbolNumber from int16 to uint16.
Microsoft PE/COFF Spec clearly states that the field is of signed interger
type. However, in reality, it's unsigned. If cl.exe needs to create a large
number of sections for COMDAT sections, it will just create more than 32768
sections. Handling large section number as negative number is not correct.
I think this is a spec bug.

Differential Revision: http://llvm-reviews.chandlerc.com/D3088

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203986 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-15 00:04:08 +00:00
Rafael Espindola
54e582179f Correctly handle an ELF symbol defined with "a = b + expr".
We were marking the symbol as absolute instead of computing b's offset + the
expression value.

This fixes pr19126.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203962 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-14 20:09:04 +00:00
Oliver Stannard
d463c7e74e Generalise assembly tests to not rely on anonymous symbol names
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203909 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-14 09:10:26 +00:00
Rafael Espindola
7e9df19d5f Use printable names to implement directional labels.
This changes the implementation of local directional labels to use a dedicated
map. With that it can then just use CreateTempSymbol, which is what the rest
of MC uses.

CreateTempSymbol doesn't do a great job at making sure the names are unique
(or being efficient when the names are not needed), but that should probably
be fixed in a followup patch.

This fixes pr18928.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203826 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-13 18:09:26 +00:00
Elena Demikhovsky
3d1ae71813 AVX-512: masked load/store + intrinsics for them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203790 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-13 12:05:52 +00:00
Hal Finkel
ab849adec4 [PowerPC] Initial support for the VSX instruction set
VSX is an ISA extension supported on the POWER7 and later cores that enhances
floating-point vector and scalar capabilities. Among other things, this adds
<2 x double> support and generally helps to reduce register pressure.

The interesting part of this ISA feature is the register configuration: there
are 64 new 128-bit vector registers, the 32 of which are super-registers of the
existing 32 scalar floating-point registers, and the second 32 of which overlap
with the 32 Altivec vector registers. This makes things like vector insertion
and extraction tricky: this can be free but only if we force a restriction to
the right register subclass when needed. A new "minipass" PPCVSXCopy takes care
of this (although it could do a more-optimal job of it; see the comment about
unnecessary copies below).

Please note that, currently, VSX is not enabled by default when targeting
anything because it is not yet ready for that.  The assembler and disassembler
are fully implemented and tested. However:

 - CodeGen support causes miscompiles; test-suite runtime failures:
      MultiSource/Benchmarks/FreeBench/distray/distray
      MultiSource/Benchmarks/McCat/08-main/main
      MultiSource/Benchmarks/Olden/voronoi/voronoi
      MultiSource/Benchmarks/mafft/pairlocalalign
      MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4
      SingleSource/Benchmarks/CoyoteBench/almabench
      SingleSource/Benchmarks/Misc/matmul_f64_4x4

 - The lowering currently falls back to using Altivec instructions far more
   than it should. Worse, there are some things that are scalarized through the
   stack that shouldn't be.

 - A lot of unnecessary copies make it past the optimizers, and this needs to
   be fixed.

 - Many more regression tests are needed.

Normally, I'd fix these things prior to committing, but there are some
students and other contributors who would like to work this, and so it makes
sense to move this development process upstream where it can be subject to the
regular code-review procedures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203768 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-13 07:58:58 +00:00
Saleem Abdulrasool
0ed4ef85a8 ARM: support emission of complex SO expressions
Support to the IAS was added to actually parse and handle the complex SO
expressions.  However, the object file lowering was not updated to compensate
for the fact that the shift operand may be an absolute expression.

When trying to assemble to an object file, the lowering would fail while
succeeding when emitting purely assembly.  Add an appropriate test.

The test case is inspired by the test case provided by Jiangning Liu who also
brought the issue to light.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203762 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-13 07:02:41 +00:00
Roman Divacky
060c0eb1d2 Allow exclamation and tilde to be parsed as a part of the ppc asm operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203699 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-12 19:25:57 +00:00
Rafael Espindola
3b8cc2299b Try harder to evaluate expressions when printing assembly.
When printing assembly we don't have a Layout object, but we can still
try to fold some constants.

Testcase by Ulrich Weigand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203677 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-12 16:55:59 +00:00
Sasa Stankovic
ff73a2bf86 [mips] Implement NaCl sandboxing of function calls:
* Add masking instructions before indirect calls (in MC layer).
  * Align call + branch delay to the bundle end (in MC layer).

Differential Revision: http://llvm-reviews.chandlerc.com/D3032


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203606 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-11 21:23:40 +00:00
Sasa Stankovic
754aaee387 [mips] Implement NaCl sandboxing of loads, stores and SP changes:
* Add masking instructions before loads and stores (in MC layer).
  * Add masking instructions after SP changes (in MC layer).
  * Forbid loads, stores and SP changes in delay slots (in MI layer).

Differential Revision: http://llvm-reviews.chandlerc.com/D2904


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203484 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-10 20:34:23 +00:00
Matheus Almeida
ffb6f6ed2a [mips] Assembly parser must invoke the target streamer to handle .set reorder macro.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203459 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-10 13:21:10 +00:00
Venkatraman Govindaraju
08da01c741 [Sparc] Add support for decoding 'swap' instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203424 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-09 23:32:07 +00:00
Sasa Stankovic
fa14948a11 Moved test file from test/MC/Mips to test/CodeGen/Mips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203298 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 22:08:46 +00:00
Duncan P. N. Exon Smith
ac4c4a8844 ARM: Make .unreq directives case-insensitive
Be case-insensitive when processing .unreq directives.

Patch by Lin Zuojian!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203251 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-07 16:16:52 +00:00
Elena Demikhovsky
b0a3627443 AVX-512: Added rrk, rrkz, rmk, rmkz, rmbk, rmbkz versions of AVX512 FP packed instructions, added encoding tests for them.
By Robert Khazanov.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203098 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-06 08:45:30 +00:00
Elena Demikhovsky
f4623cee34 AVX-512: fixed comressed displacement - by Robert Khazanov
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203096 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-06 08:15:35 +00:00
Vladimir Medic
6844c3f234 This patch implements .set dsp directive and sets appropriate feature bits.This directive is a counterpart of -mattr=dsp command line option with the exception that it does not influence elf header flags. The usage example is gives in test file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202966 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-05 11:05:09 +00:00
Vladimir Medic
7650bc0fd2 This patch implements .set mips32r2 directive and sets appropriate feature bits. It also introduces helper functions that are used to set and clear feature bits as necessary. This directive is a counterpart of -mips32r2 command line options with the exception that it does not influence elf header flags. The usage example is gives in test file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202807 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-04 09:54:09 +00:00
Kevin Qin
5dee350565 [AArch64]Fix improper diagnostics about offset range of load/store instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202775 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-04 02:05:13 +00:00