Rafael Espindola
aa8f1f0135
Implement R_X86_64_DTPOFF32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117548 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 15:11:03 +00:00
Rafael Espindola
b4d1721eff
Implement TLSLD.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117547 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 15:02:40 +00:00
Rafael Espindola
0cf15d61b7
Implement DTPOFF.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117546 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 14:48:59 +00:00
Rafael Espindola
a264f72d3f
Implement TLSLDM.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117544 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 14:37:09 +00:00
Rafael Espindola
a0a2f8734c
Implement VK_GOTNTPOFF and switch RelocNeedsGOT to use VariantKind.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117543 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 14:22:44 +00:00
Evan Cheng
7e2fe9150f
Re-commit 117518 and 117519 now that ARM MC test failures are out of the way.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117531 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 06:47:08 +00:00
Evan Cheng
9c3e8e28bd
Disable most of the ARM vfp / NEON MC tests. These are too fragile to be useful.
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I'll work with Jim, Owen, and Bill on an alternative testing strategy until
the assembly parser is available.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117530 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 06:46:17 +00:00
NAKAMURA Takumi
abd9e01baf
test/Transforms/SimplifyLibCalls/floor.ll: Mark as XFAIL:win32 due to lack of nearbyintf on MSVC. [PR8466]
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117529 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 06:46:04 +00:00
Evan Cheng
9e08ee5d16
Revert 117518 and 117519 for now. They changed scheduling and cause MC tests to fail. Ugh.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117520 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 02:00:25 +00:00
Evan Cheng
0104d9de04
- Assign load / store with shifter op address modes the right itinerary classes.
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- For now, loads of [r, r] addressing mode is the same as the
[r, r lsl/lsr/asr #] variants. ARMBaseInstrInfo::getOperandLatency() should
identify the former case and reduce the output latency by 1.
- Also identify [r, r << 2] case. This special form of shifter addressing mode
is "free".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117519 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 01:49:06 +00:00
Dale Johannesen
e49406fd63
Fix pastos in handling of AVX cvttsd2si, PR8491.
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Bruno, please review, but I'm pretty sure this is right.
Patch by Alex Mac!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117514 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 00:35:54 +00:00
Owen Anderson
cfd0e1f3ae
Add correct NEON encodings for vtbl and vtbx.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117513 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 00:18:46 +00:00
Owen Anderson
3eff4af42d
Add correct NEON encodings for vext, vtrn, vuzp, and vzip.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117512 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 23:56:39 +00:00
Dale Johannesen
f514f52790
Teach InstCombine not to use Add and Neg on FP. PR 8490.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117510 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 23:45:18 +00:00
Evan Cheng
f40deed62f
Shifter ops are not always free. Do not fold them (especially to form
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complex load / store addressing mode) when they have higher cost and
when they have more than one use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117509 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 23:41:30 +00:00
Owen Anderson
0bccec368a
Tests for NEON encoding of vrev.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117502 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 22:54:49 +00:00
Owen Anderson
498ec20703
Provide correct encodings for NEON vcvt, which has its own special immediate encoding
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for specifying fractional bits for fixed point conversions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117501 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 22:49:00 +00:00
Owen Anderson
d2fbdb7f5c
Provide correct encodings for the get_lane and set_lane variants of vmov.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117495 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 21:28:09 +00:00
Rafael Espindola
3cede2d0b2
Add support for R_386_TLS_GD, R_386_TLS_LE_32, R_386_TLS_IE and R_386_TLS_LE.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117494 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 21:23:52 +00:00
Kevin Enderby
529b1a4398
Added the x86 instruction ud2b (2nd official undefined instruction).
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117485 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 20:46:49 +00:00
Bob Wilson
f20700ca77
SelectionDAG shuffle nodes do not allow operands with different numbers of
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elements than the result vector type. So, when an instruction like:
%8 = shufflevector <2 x float> %4, <2 x float> %7, <4 x i32> <i32 1, i32 0, i32 3, i32 2>
is translated to a DAG, each operand is changed to a concat_vectors node that appends 2 undef elements. That is:
shuffle [a,b], [c,d] is changed to:
shuffle [a,b,u,u], [c,d,u,u]
That's probably the right thing for x86 but for NEON, we'd much rather have:
shuffle [a,b,c,d], undef
Teach the DAG combiner how to do that transformation for ARM. Radar 8597007.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117482 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 20:38:28 +00:00
Rafael Espindola
bc82d8b84f
Implement R_X86_64_GOTTPOFF, R_X86_64_TLSGD and R_X86_64_TPOFF32.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117481 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 20:28:07 +00:00
Owen Anderson
f587a9352a
Provide correct NEON encodings for vdup.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117475 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 19:25:54 +00:00
Rafael Espindola
4fa3478fc2
Set default type and flags for .init and .fini.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117471 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 18:45:20 +00:00
Owen Anderson
82203218d1
Tests for NEON encoding of vmovl, vmovn, vqmovn, and vqmovun.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117469 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 18:17:12 +00:00
Owen Anderson
027c84dd3e
Tests for NEON encoding of vcls, vclz, and vcnt.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117466 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 18:05:25 +00:00
Owen Anderson
df800f1b1b
Tests for NEON encoding of vneg and vqneg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117463 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 17:57:26 +00:00
Rafael Espindola
83ff4d2b0d
Produce an error for an invalid use of .symver.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117462 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 17:56:18 +00:00
Owen Anderson
633919c79a
Tests for NEON encoding of vabs and vqabs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117460 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 17:50:07 +00:00
Owen Anderson
0745c389d9
Add correct NEON encodings for vsli and vsri.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117459 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 17:40:08 +00:00
Owen Anderson
dd31ed67e6
Add correct NEON encodings for vsra and vrsra.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117458 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 17:29:29 +00:00
Rafael Espindola
bf052ac5d1
Symbols defined as the difference of other two end up in the ABS section.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117451 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 16:04:30 +00:00
Rafael Espindola
8818213247
Add support for the .symver directive. This is really ugly, but most of it is
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contained in the ELF object writer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117448 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 15:18:17 +00:00
Kevin Enderby
e460890351
Yet another tweak to X86 instructions to add ud2a as an alias to ud2
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(still to add ud2b).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117435 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 03:01:02 +00:00
Kevin Enderby
5a378076a4
Another tweak to X86 instructions to add the missing flex instruction (without
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the wait prefix).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117434 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 02:53:04 +00:00
Kevin Enderby
f4630ecc3f
Tweaks to X86 instructions to allow the 'w' suffix in places it makes
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sense, when the instruction takes the 16-bit ax register or m16 memory
location. These changes to llvm-mc matches what the darwin assembler
allows for these instructions. Done differently than in r117031 that
caused a valgrind error which was later reverted.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117433 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 02:32:19 +00:00
Kevin Enderby
41e8cc73cf
Added some aliases to the fcomip and fucompi Intel instructions. So that llvm-mc
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will accept versions that the darwin assembler allows. Forms ending in "pi" and
forms without all the operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117427 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-27 00:59:28 +00:00
Owen Anderson
86ed2324a6
Add correct NEON encodings for vqshl, vqshrn, vqshrun, vqrshl, vqshrn, and vqrshrun.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117411 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 22:50:46 +00:00
Owen Anderson
632c235a31
Correct NEON encodings for vshrn, vrshl, vrshr, vrshrn.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117402 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 21:58:41 +00:00
Jim Grosbach
8ac98cb665
FileCheck'ize
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117401 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 21:26:47 +00:00
Owen Anderson
6a36ad75a4
Add tests for NEON encoding of vshll.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117399 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 21:21:47 +00:00
Owen Anderson
4ba5d61f2d
Tests for NEON encoding of vshr.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117396 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 21:08:42 +00:00
Owen Anderson
3557d00a38
Provide correct NEON encodings for vshl, register and immediate forms.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117394 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 20:56:57 +00:00
Rafael Espindola
61e3b91da7
Add support for .ident.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117389 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 19:35:47 +00:00
Owen Anderson
c8cb3535a9
Tests for NEON encoding of vrecpe, vrecps, vrsqrte, and vsqrts.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117385 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 18:43:13 +00:00
Owen Anderson
6915cdab8f
Tests for NEON encodings of vpmin and vpmax.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117382 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 18:31:47 +00:00
Owen Anderson
bc4118bd36
Add correct NEON encoding for vpadal.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117380 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 18:18:03 +00:00
Owen Anderson
000e105d0f
Tests for NEON encoding of vpadd and vpaddl.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117377 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 18:04:51 +00:00
Owen Anderson
a88ea03bf2
Add NEON encodings for vmov and vmvn of immediates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117374 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 17:40:54 +00:00
Rafael Espindola
e4f506ff4b
Implement some relaxations for arithmetic instructions. The limitation
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on RIP relative relocations looks artificial, but this is a superset of
what we were able to do before.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117364 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-26 14:09:12 +00:00