Commit Graph

5 Commits

Author SHA1 Message Date
Manman Ren
4c74a956b2 X86 MMX: optimize transfer from mmx to i32
We used to generate a store (movq) + a load.
Now we use movd.

rdar://9946746


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167056 91177308-0d34-0410-b5e6-96231b3b80d8
2012-10-30 22:15:38 +00:00
Craig Topper
39f227e4dd Don't disable MMX support when AVX is enabled. Fix predicates for MMX instructions that were added along with SSE instructions to check for AVX in addition to SSE level.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147762 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-09 00:11:29 +00:00
Bill Wendling
0659b045cf PSHUFW is in SSE, not SSSE3.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115691 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-05 21:58:12 +00:00
Chris Lattner
ece290226a unbreak buildbot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115476 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-03 20:02:48 +00:00
Bill Wendling
8e956f7e3e Add test to make sure that the MMX intrinsic calls make it out the other end in
tact.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115458 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-03 03:30:30 +00:00