22de91aec5
Remove the old register list functions from MCRegisterInfo.
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These functions exposed the layout of the underlying data tables as
null-terminated uint16_t arrays.
Use the new MCSubRegIterator, MCSuperRegIterator, and MCRegAliasIterator
classes instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157855 91177308-0d34-0410-b5e6-96231b3b80d8
2012-06-01 23:28:34 +00:00
adea497673
[docs] Update HTML pages to refer to CSS in a way that works locally and with Sphinx.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155153 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-19 20:20:34 +00:00
082d475fc9
Fix class name.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154773 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-15 20:22:36 +00:00
00920f68a4
Fix filename and register numbers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154771 91177308-0d34-0410-b5e6-96231b3b80d8
2012-04-15 20:13:47 +00:00
9c55f5965b
llvm/docs/*.html: Fix markups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@153508 91177308-0d34-0410-b5e6-96231b3b80d8
2012-03-27 11:25:16 +00:00
7739cad69d
Add a new kind of MachineOperand: MO_RegisterMask.
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Register masks will be used as a compact representation of large clobber
lists. Currently, an x86 call instruction has some 40 operands
representing call-clobbered registers. That's more than 1kB of useless
operands per call site.
A register mask operand references a bit mask of call-preserved
registers, everything else is clobbered. The bit mask will typically
come from TargetRegisterInfo::getCallPreservedMask().
By abandoning ImplicitDefs for call-clobbered registers, it also becomes
possible to share call instruction descriptions between calling
conventions, and we can get rid of the WINCALL* instructions.
This patch introduces the new operand kind. Future patches will add
RegMask support to target-independent passes before finally the fixed
clobber lists can be removed from call instruction descriptions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148250 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 19:22:00 +00:00
a0c1fc3bd3
Adding a Hexagon cell for segmented stacks, as they have been implemented for X86 and not Sparc...
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Committed as obvious
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@148237 91177308-0d34-0410-b5e6-96231b3b80d8
2012-01-16 13:16:05 +00:00
2e9c7244b9
Add high level description of MachineInstr bundles.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146589 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-14 21:32:14 +00:00
b4b54153ad
Hexagon backend support
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146412 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-12 21:14:40 +00:00
6805b56e77
Add documentation for machine-independent DFA packetizer
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145988 91177308-0d34-0410-b5e6-96231b3b80d8
2011-12-06 23:12:42 +00:00
dda8c6ff9e
grammar.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145423 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-29 19:38:09 +00:00
30c5fa2499
Fix spelling/grammar errors found by Duncan.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145250 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-28 17:06:58 +00:00
70d2b17d52
Add a description of the status of segmented stacks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145201 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-27 22:05:46 +00:00
4b2e07aa58
docs/*.html: Fix markups.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143349 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-31 13:04:26 +00:00
33ba8b0e96
Remove the Alpha backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143164 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-27 22:56:32 +00:00
9d9c4ad186
According to Mips folks, the backend is now generally reliable (they can
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compile and use a bunch of stuff using o32 abi). Also the rt-rk.com team
claims that the JIT support they contributed, is complete for the mips
"static" relocation model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142950 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-25 20:09:31 +00:00
3e6157de57
Remove the Blackfin backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142880 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-25 00:05:42 +00:00
29074ccf6c
Remove the SystemZ backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142878 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24 23:48:32 +00:00
f22e6722a1
X86 has asterisk-free inline asm support now.
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Floating point stack inline asm works.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140033 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-19 18:15:46 +00:00
dceb002f82
PTX: Add basic documentation to CodeGenerator.html
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137315 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-11 17:34:16 +00:00
4d7ce32147
Fix a typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136646 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-01 20:38:27 +00:00
5acaeb5121
Updating stale documentation on regalloc modes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136112 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 18:31:49 +00:00
75471d698f
Describe the reasoning for compact unwind in better terms. Thanks to Nick Kledzik for the description.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136064 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-26 07:58:09 +00:00
3ef750d4b6
Fix some typos.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135956 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 20:25:03 +00:00
66bc5c602a
An initial description of the compact unwind encoding.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135955 91177308-0d34-0410-b5e6-96231b3b80d8
2011-07-25 20:19:48 +00:00
01ebd566fa
document thiscall, PR9101
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131873 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-22 22:28:47 +00:00
3f58a513e1
Document the automatic alias printing of InstAliases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130889 91177308-0d34-0410-b5e6-96231b3b80d8
2011-05-04 23:40:14 +00:00
f5af6ada3b
docs: Introduce cascading style <div> and <p> continued on <h[2-5]>.
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<h2>Section Example</h2>
<div> <!-- h2+div is applied -->
<p>Section preamble.</p>
<h3>Subsection Example</h3>
<p> <!-- h3+p is applied -->
Subsection body
</p>
<!-- End of section body -->
</div>
FIXME: Care H5 better.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130040 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-23 00:30:22 +00:00
05d0265fef
docs: Use <Hn> as Heading elements instead of <DIV class="doc_foo">.
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H1 ... doc_title
H2 ... doc_section
H3 ... doc_subsection
H4 ... doc_subsubsection
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129736 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-18 23:59:50 +00:00
d61895a4be
Fix typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129437 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-13 13:03:56 +00:00
b9a33634cc
docs: Canonicalize URLs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129181 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-09 02:13:37 +00:00
cb88ec34f0
Trivial typo fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128996 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-06 07:55:30 +00:00
49123fd58c
Finish up the first draft of the release notes.
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improvements are welcome, please commit any changes directly to SVN.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128992 91177308-0d34-0410-b5e6-96231b3b80d8
2011-04-06 06:29:50 +00:00
3ca2102c72
Don't document exactly how virtual registers are represented as integers. Code
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shouldn't depend directly on that.
Give an example of how to iterate over all virtual registers in a function
without depending on the representation.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123099 91177308-0d34-0410-b5e6-96231b3b80d8
2011-01-08 23:10:59 +00:00
d5fe3efde3
Update the target feature matrix to reflect some new features in the MBlaze backend.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122276 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-20 21:54:50 +00:00
48461f6da3
Update the Target Feature Matrix for Mips
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122203 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 22:41:43 +00:00
4c247f6f3b
further fixes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121657 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-13 00:17:12 +00:00
7138863603
fix typo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121620 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-12 02:42:57 +00:00
ac3031aa09
no alpha jit support.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119052 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-14 18:25:50 +00:00
90fd797dc7
add (and document) the ability for alias results to have
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fixed physical registers. Start moving fp comparison
aliases to the .td file (which default to using %st1 if
nothing is specified).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118352 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06 19:57:21 +00:00
98c870f87b
generalize alias support to allow the result of an alias to
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add fixed immediate values. Move the aad and aam aliases to
use this, and document it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118350 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06 19:25:43 +00:00
c7a03fbe66
document instalias.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118335 91177308-0d34-0410-b5e6-96231b3b80d8
2010-11-06 08:30:26 +00:00
943beeb747
Validate HTML.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117847 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 21:07:28 +00:00
50e5972dc6
add missing tag
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117846 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 20:21:00 +00:00
8cf8bcc40c
fix typos and some serious bugs in feature handling (but not for
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cases that are currently exercised). Thanks to Frits van Bommel for
the great review!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117840 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 19:47:49 +00:00
693173feef
Implement (and document!) support for MnemonicAlias's to have Requires
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directives, allowing things like this:
def : MnemonicAlias<"pop", "popl">, Requires<[In32BitMode]>;
def : MnemonicAlias<"pop", "popq">, Requires<[In64BitMode]>;
Move the rest of the X86 MnemonicAliases over to the .td file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117830 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 19:23:13 +00:00
674c1dcca2
implement (and document!) the first kind of MC assembler alias, which
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just remaps one mnemonic to another. Convert a few of the X86 aliases
from .cpp to .td code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117815 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-30 17:36:36 +00:00
219ddf5626
clarify that not having the ".o file writing" feature
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doesn't mean that you can't get a .o file. Apparently
this is confusing :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117523 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-28 02:22:02 +00:00
94cc4feeaf
Update target feature matrix for CellSPU
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117255 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-25 08:57:30 +00:00
4e13612ea7
Update target feature matrix for Blackfin.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117245 91177308-0d34-0410-b5e6-96231b3b80d8
2010-10-24 20:04:05 +00:00
