Jim Grosbach
25ddc2bf7e
ARM Thumb2 asm parsing [SU]XT[BH] without rotate but with .w.
...
Add inst alias to handle these assembly forms. Add tests, too.
rdar://10178799
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140647 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27 22:18:54 +00:00
Bill Wendling
0481d29d49
This is the start of the new SjLj EH preparation pass, which will replace the
...
current IR-level pass.
The old SjLj EH pass has some problems, especially with the new EH model. Most
significantly, it violates some of the new restrictions the new model has. For
instance, the 'dispatch' table wants to jump to the landing pad, but we cannot
allow that because only an invoke's unwind edge can jump to a landing pad. This
requires us to mangle the code something awful. In addition, we need to keep the
now dead landingpad instructions around instead of CSE'ing them because the
DWARF emitter uses that information (they are dead because no control flow edge
will execute them - the control flow edge from an invoke's unwind is superceded
by the edge coming from the dispatch).
Basically, this pass belongs not at the IR level where SSA is king, but at the
code-gen level, where we have more flexibility.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140646 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27 22:14:12 +00:00
Akira Hatanaka
8eea4616bf
Embed patterns in definitions of MFC1 and MTC1 instead of defining them outside
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of the instruction definitions using Pat<>.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140644 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27 22:01:01 +00:00
Jim Grosbach
5405d58e21
Rename AddSelectionDAGCSEId() to addSelectionDAGCSEId().
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Naming conventions consistency. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140636 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27 20:59:33 +00:00
Justin Holewinski
332850d8cc
PTX: Fix case where printed alignment could be 0
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140624 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27 19:25:49 +00:00
Justin Holewinski
f47dfba023
PTX: Use external symbols to keep track of params and locals. This also fixes
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a couple of outstanding issues with frame objects occuring as instruction
operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140616 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27 18:12:55 +00:00
Jakob Stoklund Olesen
8e695eb5fa
Use existing function.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140615 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27 17:55:08 +00:00
Akira Hatanaka
237e7a278a
Fix function MipsRegisterInfo::getRegisterNumbering.
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Return numbers of 64-bit registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140609 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27 17:15:27 +00:00
Akira Hatanaka
78fec58c07
Do not add the pass that restores $gp if target is Mips64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140607 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27 16:58:43 +00:00
Akira Hatanaka
854222fa47
Mark MipsPseudo isPseudo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140598 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27 04:57:54 +00:00
Justin Holewinski
13e0c805a2
PTX: Add support for sitofp in backend
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140593 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-27 01:04:47 +00:00
Owen Anderson
2dafe200ca
Remove extraneous commit garbage.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140581 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 23:14:02 +00:00
Akira Hatanaka
f40de9d287
Set register class of a register according to value of HasMips64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140570 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 21:55:17 +00:00
Akira Hatanaka
8b4198da9d
Define variable HasMips64 in MipsTargetLowering.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140569 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 21:47:02 +00:00
Akira Hatanaka
09dd60feef
In single float mode, double precision FP arguments are passed in integer
...
registers, so there is no need to check here.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140568 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 21:37:50 +00:00
Owen Anderson
0afa0094af
ASR #32 is not allowed on Thumb2 USAT and SSAT instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140560 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 21:06:22 +00:00
Justin Holewinski
22d54da918
PTX: Fix memcpy intrinsic to handle 64-bit pointers
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140556 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 19:19:48 +00:00
Justin Holewinski
bc97f4402b
PTX: Implement PTXSelectionDAGInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140549 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 18:57:27 +00:00
Justin Holewinski
63bce90c0d
PTX: Implement ISD::ANY_EXTEND
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140548 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 18:57:24 +00:00
Justin Holewinski
63602ed876
PTX: Fix detection of stack load/store vs. global load/store, as well as fix the
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printing of local offsets
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140547 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 18:57:22 +00:00
Justin Holewinski
22f3c59ec3
PTX: SM > 2.0 implies +double
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140536 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 16:20:36 +00:00
Justin Holewinski
58788503b8
PTX: Fix some lingering issues with stack allocation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140535 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 16:20:34 +00:00
Justin Holewinski
d5c3920f8d
PTX: Split up the TableGen instruction definitions into logical units
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140534 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 16:20:31 +00:00
Justin Holewinski
c1d8fbd41a
PTX: Unify handling of loads/stores
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140533 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 16:20:28 +00:00
Justin Holewinski
6b8990df42
PTX: Handle FrameIndex nodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140532 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 16:20:25 +00:00
David Meyer
8f418b11d2
PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 2011-06-09-TailCallByVal and 2010-11-04-BigByval
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140516 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 06:13:20 +00:00
Craig Topper
100d86ada5
Fix VEX decoding in i386 mode. Fixes PR11008.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140515 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-26 05:12:43 +00:00
Jakob Stoklund Olesen
74e2d6ea66
Clean up code after renaming LowerSubregs -> ExpandPostRAPseudos.
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No functional change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140470 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-25 16:46:08 +00:00
Akira Hatanaka
8aa4b4cb6f
Add .td file.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140446 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-24 01:40:18 +00:00
Akira Hatanaka
95934844e3
Preparation for adding simple Mips64 instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140443 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-24 01:34:44 +00:00
Jakob Stoklund Olesen
51f0c76419
Only run MF.verify() with EXPENSIVE_CHECKS=1.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140441 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-24 01:11:19 +00:00
Owen Anderson
4d2a00147d
Teach the Thumb2 AsmParser to accept pre-indexed loads/stores with an offset of #-0.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140426 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 22:25:02 +00:00
Jakob Stoklund Olesen
11ebe3d7c1
Also match negative offsets for addrmode3 and addrmode5.
...
Math is hard, and isScaledConstantInRange() always returned false for
negative constants. It was doing unsigned division of negative numbers
before casting back to signed.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140425 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 22:10:33 +00:00
Owen Anderson
4a713570b6
Add more fixed bits to USAT16 encoding to filter out incorrect decodings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140422 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 21:57:50 +00:00
Owen Anderson
0781c1f700
Post-index loads/stores in still need to print the post-indexed immediate, even if it's zero, to distinguish them from non-post-indexed instructions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140420 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 21:26:40 +00:00
Owen Anderson
31d485ec9a
Reapply r140412 (Thumb2 reg-reg loads cannot target SP or PC), with invalid testcases updated.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140415 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 21:07:25 +00:00
Owen Anderson
df0caeb6ec
Revert r140412. This affects more instructions than intended.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140413 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 21:02:01 +00:00
Owen Anderson
d256056581
Thumb2 register-shifted-register loads cannot target the PC or the SP.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140412 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 21:00:32 +00:00
Akira Hatanaka
45b73e2f3f
Implement N32/64 calling convention. Patch by Liu.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140401 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 19:08:15 +00:00
Akira Hatanaka
792016bc22
Make FGR64RegisterClass available if target is Mips64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140397 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 18:28:39 +00:00
Akira Hatanaka
b1dcff0fe3
Add definitions of 64-bit register files. Add code for returning Mips64's sets of
...
callee-saved registers and reserved registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140395 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 18:11:56 +00:00
Justin Holewinski
a5745569b6
PTX: Fix parameter order bug
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140394 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 17:59:11 +00:00
Wesley Peck
2e3441e5e5
Fix a couple of 80 column violations.
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patch contributed by Jia Liu!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140391 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 17:24:41 +00:00
Justin Holewinski
dc0baf9b40
PTX: Cleanup unused code in PTXMachineFunctionInfo
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140390 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 17:15:53 +00:00
Justin Holewinski
d7070fe6df
PTX: Fix another 80-column violation
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140387 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 16:50:35 +00:00
Justin Holewinski
75d809599b
PTX: Handle function call return values
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140386 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 16:48:41 +00:00
Richard Osborne
0353dab90e
Fix 80 column violations.
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Original patch by Liu.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140385 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 16:28:10 +00:00
Duncan Sands
04aa4aee89
Implement Chris's suggestion of legalizing the various SSE and AVX
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hadd/hsub intrinsics into the new fhadd/fhsub X86 node.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140383 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 16:10:22 +00:00
Justin Holewinski
e953a64cb5
PTX: Start fixing function calls
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140378 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 14:31:12 +00:00
Justin Holewinski
d3dec06447
PTX: Remove PTX calling convention files
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140377 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 14:18:27 +00:00
Justin Holewinski
1cde87d202
[PATCH 2/2] PTXInstrInfo.td PTXIntrinsicInstrInfo.td 80 columns
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From 5936c03172e251f12a0332d1033de5718e6e2091 Mon Sep 17 00:00:00 2001
---
lib/Target/PTX/PTXInstrInfo.td | 165 ++++++++++++++++++++----------
lib/Target/PTX/PTXIntrinsicInstrInfo.td | 88 +++++++++++------
2 files changed, 167 insertions(+), 86 deletions(-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140376 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 14:18:24 +00:00
Justin Holewinski
27f08fc619
PTX: Generalize handling of .param types
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140375 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 14:18:22 +00:00
Justin Holewinski
04b5ebc74c
PTX: Cleanup unused code in the PTXMFInfoExtract pass
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140374 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 14:18:19 +00:00
Akira Hatanaka
aaa9fc2e37
Add definitions of 64-bit int registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140366 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 02:33:15 +00:00
Akira Hatanaka
373e3a4091
Do not rely on the enum values of argument registers A0-A3 being consecutive.
...
Define function getNextIntArgReg, which takes a register as a parameter and
returns the next O32 argument integer register. Use this function when double
precision floating point arguments are passed in two integer registers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140363 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-23 00:58:33 +00:00
Eli Friedman
a6176adc8a
PR10991: make fast-isel correctly check whether accessing a global through an alias involves thread-local storage. (I'm not entirely sure how this is supposed to work, but this patch makes fast-isel consistent with the normal isel path.)
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140355 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 23:41:28 +00:00
Akira Hatanaka
40eda4626d
Make changes in instruction and pattern definitions so that tablegen does not
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complain it cannot infer types in patterns. Fix a mistake in definition of
SDT_MipsExtractElementF64.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140354 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 23:31:54 +00:00
Jakob Stoklund Olesen
4bd89873be
Add support for GR32 <-> FR32 cross class copies.
...
We already support GR64 <-> VR128 copies. All of these copies break
partial register dependencies by zeroing the high part of the target
register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140348 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 22:45:24 +00:00
Duncan Sands
17470bee5f
Synthesize SSE3/AVX 128 bit horizontal add/sub instructions from
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floating point add/sub of appropriate shuffle vectors. Does not
synthesize the 256 bit AVX versions because they work differently.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140332 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 20:15:48 +00:00
Akira Hatanaka
98f49c4413
Print parentheses in next line.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140325 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 18:29:29 +00:00
Akira Hatanaka
ebb90dbb54
Change subreg index of AFPR64 from sub_fpeven to sub_32 per Jakob's comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140324 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 18:24:21 +00:00
Akira Hatanaka
95a091a0b6
Define a new sub-register index sub_32 for accessing the 32-bit sub-register of
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a 64-bit integer register. Move the subreg index definitions to the beginning
of the file.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140319 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 17:57:32 +00:00
Akira Hatanaka
26bcc701a2
Print three closing parentheses when Kind is either VK_Mips_GPOFF_HI or
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VK_Mips_GPOFF_LO.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140316 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 17:44:37 +00:00
Akira Hatanaka
d27fda49c4
Add F31 to the set of callee-saved registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140315 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 17:35:03 +00:00
Akira Hatanaka
4e41416359
Fix typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140313 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 17:26:58 +00:00
Justin Holewinski
7c9dd62441
PTX: Remove physical register defs
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140310 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 16:45:48 +00:00
Justin Holewinski
5422a0f166
PTX: Use .param space for device function return values on SM 2.0+, and attempt
...
to fix up parameter passing on SM < 2.0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140309 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 16:45:46 +00:00
Justin Holewinski
05591be5ed
PTX: Fix style issues
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140308 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 16:45:43 +00:00
Justin Holewinski
297984d7c6
PTX: Fixup codegen to handle emission of virtual registers.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140307 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 16:45:40 +00:00
Justin Holewinski
40466cc758
PTX: Customize codegen passes in backend
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140306 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 16:45:37 +00:00
Justin Holewinski
247ee00bce
PTX: Add new PTX-specific register allocator that keeps virtual registers
...
instead of allocating physical registers.
This is part of a work-in-progress overhaul of the PTX register allocation scheme.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140305 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 16:45:33 +00:00
Craig Topper
adf01b3f18
Fix register printing in disassembling of push/pop of segment registers and in/out in Intel syntax mode. Fixes PR10960
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140299 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 07:01:50 +00:00
Akira Hatanaka
bb7d289aeb
Add definition of 64-bit floating registers used for Mips64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140297 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 03:48:47 +00:00
Benjamin Kramer
2c2ccbf108
The SSE version differences for fmin/fmax are more involved than I thought.
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- x87: no min or max.
- SSE1: min/max for single precision scalars and vectors.
- SSE2: min/max for single and double precision scalars and vectors.
- AVX: as SSE2, but also supports the wider ymm vectors. (this is covered by the isTypeLegal check)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140296 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 03:27:22 +00:00
Akira Hatanaka
e33ca9ce1f
Add enums and functions for symbols Mips64 uses.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140295 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 03:09:07 +00:00
Benjamin Kramer
74f3501d15
X86: Don't form min/max nodes if the target is missing SSE.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140294 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 03:01:42 +00:00
Akira Hatanaka
459cad2dfd
Mips64 aligns stack on 16-byte boundary.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140292 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 02:53:37 +00:00
Akira Hatanaka
c56f5ea4c3
Remove unnecessary condition check.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140291 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-22 02:41:29 +00:00
Owen Anderson
6126870193
Turns out that Thumb2 ADR doesn't need special printing like LDR does. Fix other test failures I caused.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140284 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 23:53:44 +00:00
Owen Anderson
e136872970
Print out immediate offset versions of PC-relative load/store instructions as [pc, #123 ] rather than simply #123 .
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140283 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 23:44:46 +00:00
Benjamin Kramer
15c9a1f60c
X86Disassembler: if verbose logging is going to nulls(), disable logging completely.
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Otherwise we'll spend a ridiculous amount of time pretty printing debug output and then discarding it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140276 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 21:47:35 +00:00
Wesley Peck
91b60c1487
Fix some simple copy-paste errors in MBlaze ASM Parser and Makefile.
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patch contributed by Jia Liu!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140273 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 19:23:46 +00:00
Owen Anderson
519020adf1
These do not need to be conditional on the presence of CommentStream, as they have a fallback path now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140267 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 17:58:45 +00:00
Akira Hatanaka
0e64f810a5
Undo a change made in r140254.
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MipsArchVersion needs to be initialized to Mips32.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140261 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 17:31:45 +00:00
Nadav Rotem
64ac73bb15
fix comment
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140258 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 17:14:40 +00:00
Akira Hatanaka
47c40a2cf9
MipsArchVersion does not need to be in the initialization list and MipsABI
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should be initialized to UnknownABI.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140254 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 16:41:43 +00:00
Nadav Rotem
9c6cdf4c1c
Insert a sanity check on the combining of x86 truncing-store nodes. This comes to replace the problematic check that was removed in r139995.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140246 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 08:45:10 +00:00
Richard Trieu
23946fcaae
Change:
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assert(!"error message");
To:
assert(0 && "error message");
which is more consistant across the code base.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140234 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 03:09:09 +00:00
Akira Hatanaka
2464810ac2
Add a base class for Mips TargetMachines and add Mips64 TargetMachines.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140233 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 03:00:58 +00:00
Akira Hatanaka
8c1b4bf066
Set ABI if it hasn't been set on the command line.
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Check if architecture & ABI combination is valid.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140230 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 02:45:29 +00:00
Akira Hatanaka
50fa74e8d2
Fix typo.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140229 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 02:24:25 +00:00
Andrew Trick
3be654f808
Lower ARM adds/subs to add/sub after adding optional CPSR operand.
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This is still a hack until we can teach tblgen to generate the
optional CPSR operand rather than an implicit CPSR def. But the
strangeness is now limited to the selection DAG. ADD/SUB MI's no
longer have implicit CPSR defs, nor do we allow flag setting variants
of these opcodes in machine code. There are several corner cases to
consider, and getting one wrong would previously lead to nasty
miscompilation. It's not the first time I've debugged one, so this
time I added enough verification to ensure it won't happen again.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140228 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 02:20:46 +00:00
Andrew Trick
e23dc9c0ef
whitespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140227 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 02:17:37 +00:00
Owen Anderson
317eaf1993
In the disassembler C API, be careful not to confuse the comment streamer that the disassembler outputs annotations on with the streamer that the InstPrinter will print them on.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140217 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-21 00:25:23 +00:00
Akira Hatanaka
5663344127
Change the names of functions isMips* to hasMips*.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140214 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 23:53:09 +00:00
Bruno Cardoso Lopes
f4b841d4e2
Revert r140097, working on a better approach
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140203 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 23:19:29 +00:00
Bruno Cardoso Lopes
149f29f1fd
Simplify max/minp[s|d] dagcombine matching
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140199 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 22:34:45 +00:00
Bruno Cardoso Lopes
4e42335972
Tidy up a bit more, fix tab and remove trailing whitespaces
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140186 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 21:45:26 +00:00
Bruno Cardoso Lopes
448d986858
The wrong relocation was being emitted for several SSSE3 instructions.
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This fixes PR10963. Thanks to Benjamin for finding the wrong tablegen
declaration.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140184 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 21:39:21 +00:00
Bruno Cardoso Lopes
77169a9197
Tidy up code!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140183 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-20 21:39:06 +00:00