Commit Graph

15088 Commits

Author SHA1 Message Date
Chris Lattner
f3f333dbd6 Allow targets to custom lower expanded BIT_CONVERT's
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30217 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-09 00:20:27 +00:00
Nate Begeman
94be248dbb First pass at supporting relocations. Relocations are written correctly to
the file now, however the relocated address is currently wrong.  Fixing
that will require some deep pondering.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30207 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 22:42:09 +00:00
Evan Cheng
6f34b43292 Fixed a FuseTwoAddrInst() bug: consider GlobalAddress and JumpTableIndex
in addition to immediate operands.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30205 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 21:08:13 +00:00
Chris Lattner
0c5b8dac79 Non-allocatable physregs can be killed and dead, but don't treat them as
safe for later allocation.  This fixes McCat/18-imp with llc-beta.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30204 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 20:21:31 +00:00
Chris Lattner
cc406328bf This fixes Benchmarks/Prolangs-C/unix-smail
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30198 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 19:11:11 +00:00
Chris Lattner
45d5788123 Fix a bunch of llc-beta failures on x86 yesterday. Don't allow selection
of unallocatable registers, just because an alias is allocatable.  We were
picking registers like SIL just because ESI was being used.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30197 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 19:03:30 +00:00
Rafael Espindola
0a200600e7 implement shl and sra
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30191 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 17:36:23 +00:00
Chris Lattner
40f4ba5e71 Use __USER_LABEL_PREFIX__ to get the prefix added by the current host.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30190 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 17:03:56 +00:00
Rafael Espindola
4e30764d55 add the eor (xor) instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30189 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 16:59:47 +00:00
Jim Laskey
f45c25f720 Missing tab
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30188 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 13:06:56 +00:00
Rafael Espindola
5c2aa0a4d8 implement unconditional branches
fix select.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30186 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 12:47:03 +00:00
Evan Cheng
36978b9c61 Remove TEST64mr. It's same as TEST64rm since and is commutative.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30178 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 06:56:55 +00:00
Evan Cheng
25ab690a43 Committing X86-64 support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30177 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 06:48:29 +00:00
Nate Begeman
6fe6084ebf We actually do support object file writing, so don't return true (error)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30173 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 03:42:15 +00:00
Evan Cheng
8cf723d8eb - Identify a vector_shuffle that can be turned into an undef, e.g.
shuffle V1, <undef>, <undef, undef, 4, 5>
- Fix some suspicious logic into LowerVectorShuffle that cause less than
  optimal code by failing to identify MOVL (move to lowest element of a
  vector).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30171 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-08 01:50:06 +00:00
Jim Laskey
fde1b3bb2f 1. Remove condition on delete.
2. Protect and outline createTargetAsmInfo.

3. Misc. kruft.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30169 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 23:39:26 +00:00
Devang Patel
f93f68347f Untabify.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30168 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 23:29:19 +00:00
Devang Patel
c8719e9353 Use iterative do-while loop instead of recursive DFSPass calls to
reduce amount of stack space used at runtime.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30167 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 23:22:37 +00:00
Chris Lattner
2dd538c2d2 add a new value for the command line optn
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30165 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 22:32:28 +00:00
Chris Lattner
cdb341dcfa Fix a cross-build issue. The asmsyntax shouldn't be affected by the build
host, it should be affected by the target.  Allow the command line option to
override in either case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30164 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 22:29:41 +00:00
Jim Laskey
a0f3d17daa Make target asm info a property of the target machine.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30162 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 22:06:40 +00:00
Jim Laskey
8e8de8f776 Break out target asm info into separate files.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30161 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 22:05:02 +00:00
Chris Lattner
e99c623e75 Throttle back tail duplication to avoid creating really ugly sequences of code.
For Transforms/TailDup/if-tail-dup.ll, f.e., it produces:

_foo:
        movl 8(%esp), %eax
        movl 4(%esp), %ecx
        testl $1, %ecx
        je LBB1_2       #cond_next
LBB1_1: #cond_true
        movl $1, (%eax)
LBB1_2: #cond_next
        testl $2, %ecx
        je LBB1_4       #cond_next10
LBB1_3: #cond_true6
        movl $1, 4(%eax)
LBB1_4: #cond_next10
        testl $4, %ecx
        je LBB1_6       #cond_next18
LBB1_5: #cond_true14
        movl $1, 8(%eax)
LBB1_6: #cond_next18
        testl $8, %ecx
        je LBB1_8       #return
LBB1_7: #cond_true22
        movl $1, 12(%eax)
        ret
LBB1_8: #return
        ret

instead of:

_foo:
        movl 4(%esp), %eax
        testl $2, %eax
        sete %cl
        movl 8(%esp), %edx
        testl $1, %eax
        je LBB1_2       #cond_next
LBB1_1: #cond_true
        movl $1, (%edx)
        testb %cl, %cl
        jne LBB1_4      #cond_next10
        jmp LBB1_3      #cond_true6
LBB1_2: #cond_next
        testb %cl, %cl
        jne LBB1_4      #cond_next10
LBB1_3: #cond_true6
        movl $1, 4(%edx)
        testl $4, %eax
        je LBB1_6       #cond_next18
        jmp LBB1_5      #cond_true14
LBB1_4: #cond_next10
        testl $4, %eax
        je LBB1_6       #cond_next18
LBB1_5: #cond_true14
        movl $1, 8(%edx)
        testl $8, %eax
        je LBB1_8       #return
        jmp LBB1_7      #cond_true22
LBB1_6: #cond_next18
        testl $8, %eax
        je LBB1_8       #return
LBB1_7: #cond_true22
        movl $1, 12(%edx)
        ret
LBB1_8: #return
        ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30158 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 21:30:15 +00:00
Chris Lattner
ffc0b2663e Eliminate X86ISD::TEST, using X86ISD::CMP instead. Match X86ISD::CMP patterns
using test, which provides nice simplifications like:

-       movl %edi, %ecx
-       andl $2, %ecx
-       cmpl $0, %ecx
+       testl $2, %edi
        je LBB1_11      #cond_next90

There are a couple of dagiselemitter deficiencies that this exposes, they will
be handled later.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30156 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 20:33:45 +00:00
Chris Lattner
b14ca605d7 Some notes on better load folding we could do
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30155 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 20:32:01 +00:00
Evan Cheng
ec3bc39413 Consistency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30152 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 19:03:48 +00:00
Evan Cheng
61c958e691 Fix pasto that was breaking x86 tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30151 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 18:50:20 +00:00
Chris Lattner
833eb68a1f Add new option to leave asm names alone
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30149 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 18:20:41 +00:00
Jim Laskey
05a059d5d8 Make the x86 asm flavor part of the subtarget info.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30146 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 12:23:47 +00:00
Chris Lattner
d5e93c0795 Fix CodeGen/Generic/2006-09-06-SwitchLowering.ll, a bug where SDIsel inserted
too many phi operands when lowering a switch to branches in some cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30142 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 01:59:34 +00:00
Evan Cheng
95971c51b0 Clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30140 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-07 01:17:57 +00:00
Evan Cheng
48ff2fb129 Watch out for variable_ops instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30135 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-06 20:32:45 +00:00
Evan Cheng
3530bafe00 Variable ops instructions may ignore the last few operands for code emission.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30134 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-06 20:24:14 +00:00
Jim Laskey
7c95ad4fb0 Oops - forgot to update banner.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30131 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-06 19:21:41 +00:00
Jim Laskey
ec0d9fe2b2 Separate target specifc asm properties from asm printers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30127 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-06 18:35:33 +00:00
Jim Laskey
563321a258 Separate target specific asm properties from the asm printers.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30126 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-06 18:34:40 +00:00
Rafael Espindola
b52b54d4af add the orr instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30125 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-06 18:03:12 +00:00
Evan Cheng
5d8062bcee Only call isUse/isDef on register operands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30122 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 20:32:06 +00:00
Chris Lattner
6cdb1ea610 Bugfix to work with the two-addr changes that have been made in the tree recently
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30121 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 20:27:32 +00:00
Chris Lattner
d8f44e07b8 Only call isUse/isDef on register operands
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30118 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 20:19:27 +00:00
Chris Lattner
67942f5dc3 Don't call isDef on non-registers
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30117 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 20:02:51 +00:00
Chris Lattner
97d2dbd100 Fix Duraid's changes to work when TLI is null. This fixes the failing
lowerinvoke regtests.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30115 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 17:48:07 +00:00
Chris Lattner
7acf5f39fe Change the default to 0, which means 'default'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30114 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 17:39:15 +00:00
Evan Cheng
2f5993bcf1 Fix a few dejagnu failures. e.g. fast-cc-merge-stack-adj.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30113 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 08:32:49 +00:00
Evan Cheng
23b3122c44 JIT encoding bug.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30112 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 05:59:25 +00:00
Chris Lattner
0e42d81a83 Update the X86 JIT to make it work with the new two-addr changes. This also
adds assertions that check to make sure every operand gets emitted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30110 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 02:52:35 +00:00
Chris Lattner
09e460662a Completely eliminate def&use operands. Now a register operand is EITHER a
def operand or a use operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30109 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 02:31:13 +00:00
Chris Lattner
2926869b4a Fix a long-standing wart in the code generator: two-address instruction lowering
actually *removes* one of the operands, instead of just assigning both operands
the same register.  This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.

Changing this also gets rid of a bunch of hacky code in various places.

This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30108 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 02:12:02 +00:00
Andrew Lenharth
89c0b4a90e jmp_bufs are this big on alpha.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30107 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 00:22:25 +00:00
Rafael Espindola
3a02f020eb add support for returning 64bit values
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30103 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-04 19:05:01 +00:00