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4 Commits

Author SHA1 Message Date
Eric Christopher
9f85dccfc6 Remove the TargetMachine forwards for TargetSubtargetInfo based 
information and update all callers. No functional change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214781 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-08-04 21:25:23 +00:00
Chad Rosier
82c93451f3 [AArch64] Extend the number of scalar instructions supported in the AdvSIMD 
scalar integer instruction pass.

This is a patch I had lying around from a few months ago.  The pass is
currently disabled by default, so nothing to interesting.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214779 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-08-04 21:20:25 +00:00
Benjamin Kramer
ce63ab327a Run sort_includes.py on the AArch64 backend. 
No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213938 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-07-25 11:42:14 +00:00
Tim Northover
29f94c7201 AArch64/ARM64: move ARM64 into AArch64's place 
This commit starts with a "git mv ARM64 AArch64" and continues out
from there, renaming the C++ classes, intrinsics, and other
target-local objects for consistency.

"ARM64" test directories are also moved, and tests that began their
life in ARM64 use an arm64 triple, those from AArch64 use an aarch64
triple. Both should be equivalent though.

This finishes the AArch64 merge, and everyone should feel free to
continue committing as normal now.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-05-24 12:50:23 +00:00