Commit Graph

111008 Commits

Author SHA1 Message Date
Craig Topper
0ea6f98f9c Use range-based for loop.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224106 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 07:52:11 +00:00
Craig Topper
3248223b66 Remove unnecessary calls to unique_ptr::get.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224105 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 07:52:09 +00:00
Craig Topper
e34c5782a8 Remove an unnecessary reference variable that pointed to a unique_ptr variable. Just use the unique_ptr variable directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224104 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 07:52:06 +00:00
Craig Topper
2a4988e8fc Use unique_ptr operator= instead of constructor to make it explicit that there's no conversion occurring.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224103 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 07:52:00 +00:00
Ekaterina Romanova
e0b0363e44 A fix for PR21176.
DW_OP_const <const> doesn't describe a constant value, but a value at a constant address. 
The proper way to describe a constant value is DW_OP_constu <const>, DW_OP_stack_value. 
Added DW_OP_stack_value to the stack. 

Marked incorrect-variable-debugloc1.ll to xfail for PowerPC64, while the the failure (PR21881) 
is being investigated. 



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224098 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 05:11:47 +00:00
Steven Wu
a511846bdf Fix another infinite loop in InstCombine
Summary:
InstCombine infinite-loops for the testcase added
It is because InstCombine is generating instructions that can be
optimized by itself. Fix by not optimizing frem if the optimized
type is the same as original type.
rdar://problem/19150820

Reviewers: majnemer

Differential Revision: http://reviews.llvm.org/D6634

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224097 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 04:34:07 +00:00
Matt Arsenault
002ca4ca3f R600: Fix min/max matching problems with unordered compares
The returned operand needs to be permuted for the unordered
compares. Also fix incorrectly producing fmin_legacy / fmax_legacy
for f64, which don't exist.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224094 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 02:30:37 +00:00
Matt Arsenault
03858c733c R600/SI: fmin/fmax_legacy are not associative
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224093 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 02:30:33 +00:00
Matt Arsenault
3d1ca355c4 R600/SI: Don't promote f32 select to i32
This is nice for the instruction patterns, but it complicates
min / max matching. The select doesn't have the correct type and would
require looking through the bitcasts for the real float operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224092 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 02:30:29 +00:00
Richard Smith
d948b98cba Update the modules build to match r223802.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224091 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 02:25:18 +00:00
Duncan P. N. Exon Smith
b0d1b981e8 Bitcode: Add missing "Remove in 4.0" comments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 02:11:31 +00:00
Matthias Braun
e821037df7 Document that PassManager::add() may delete the pass right away.
Also remove redundant documentation:
- doxygen will copy documentation to overriden methods.
- Use \copydoc on PIMPL classes instead of replicating the text.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224089 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 01:27:01 +00:00
Peter Collingbourne
c0100322c8 Tom Stellard is now the code owner for libclc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224088 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 01:11:48 +00:00
Philip Reames
b7dfa31ac8 Comment and minor code cleanup for GCStrategy (NFC)
Updating comments to reflect the current state of the world after my recent changes to ownership structure and generally better describe what a GCStrategy is and how it works.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224086 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 00:49:03 +00:00
Matt Arsenault
6e6318f148 Add target hook for whether it is profitable to reduce load widths
Add an option to disable optimization to shrink truncated larger type
loads to smaller type loads. On SI this prevents using scalar load
instructions in some cases, since there are no scalar extloads.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224084 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-12 00:00:24 +00:00
Sanjay Patel
6f44989d39 remove function names from comments; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224080 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 23:38:43 +00:00
Matt Arsenault
73460aea4f R600/SI: Handle physical registers in getOpRegClass
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224079 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 23:37:34 +00:00
Matt Arsenault
bdf0ee0d1d R600/SI: Don't verify constant bus usage of flag ops
This was checking if pseudo-operands like the source
modifiers were using the constant bus, which happens to work
because the values these all can be happen to be valid inline
immediates.

This fixes a later commit which starts checking the register class
of the operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224078 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 23:37:32 +00:00
Duncan P. N. Exon Smith
4bedb48751 Bitcode: Use unsigned char to record MDStrings
`MDString`s can have arbitrary characters in them.  Prevent an assertion
that fired in `BitcodeWriter` because of sign extension by copying the
characters into the record as `unsigned char`s.

Based on a patch by Keno Fischer; fixes PR21882.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224077 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 23:34:30 +00:00
Sanjay Patel
033d8ea7a9 return without temporary; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224076 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 23:30:36 +00:00
Matthias Braun
8ac056b9dd Enable MachineVerifier in debug mode for X86, ARM, AArch64, Mips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224075 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 23:18:03 +00:00
Ahmed Bougacha
11fcb48306 [X86] Add a temporary testcase for PR21876/r223996.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224074 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 23:07:52 +00:00
Duncan P. N. Exon Smith
e39dba9f07 Bitcode: Add METADATA_NODE and METADATA_VALUE
This reflects the typelessness of `Metadata` in the bitcode format,
removing types from all metadata operands.

`METADATA_VALUE` represents a `ValueAsMetadata`, and always has two
fields: the type and the value.

`METADATA_NODE` represents an `MDNode`, and unlike `METADATA_OLD_NODE`,
doesn't store types.  It stores operands at their ID+1 so that `0` can
reference `nullptr` operands.

Part of PR21532.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224073 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 23:02:24 +00:00
Hal Finkel
f329765d23 [PowerPC] Better lowering for add/or of a FrameIndex
If we have an add (or an or that is really an add), where one operand is a
FrameIndex and the other operand is a small constant, we can combine the
lowering of the FrameIndex (which is lowered as an add of the FI and a zero
offset) with the constant operand.

Amusingly, this is an old potential improvement entry from
lib/Target/PowerPC/README.txt which had never been resolved. In short, we used
to lower:

        %X = alloca { i32, i32 }
        %Y = getelementptr {i32,i32}* %X, i32 0, i32 1
        ret i32* %Y

as:

        addi 3, 1, -8
        ori 3, 3, 4
        blr

and now we produce:

        addi 3, 1, -4
        blr

which is much more sensible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224071 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 22:51:06 +00:00
Duncan P. N. Exon Smith
934da0fc3f Bitcode: Add OLD_ prefix to metadata node records
I'm about to change these, so move the old ones out of the way.

Part of PR21532.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224070 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 22:30:48 +00:00
Matt Arsenault
9dd31e8016 Try to include operand counts for mismatches in tablegen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224068 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 22:27:14 +00:00
Matt Arsenault
29ae5b8a8c R600/SI: Use unordered equal instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224067 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 22:15:43 +00:00
Matt Arsenault
e5bd584683 R600/SI: Make more unordered comparisons legal
This saves a second compare and an and / or by using
the unordered comparison instructions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224066 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 22:15:39 +00:00
Matt Arsenault
8651adfe4f R600/SI: Use unordered not equal instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224065 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 22:15:35 +00:00
Alexey Samsonov
05e5839d4f [ASan] Change fake stack and local variables handling.
This commit changes the way we get fake stack from ASan runtime
(to find use-after-return errors) and the way we represent local
variables:
  - __asan_stack_malloc function now returns pointer to newly allocated
    fake stack frame, or NULL if frame cannot be allocated. It doesn't
    take pointer to real stack as an input argument, it is calculated
    inside the runtime.
  - __asan_stack_free function doesn't take pointer to real stack as
    an input argument. Now this function is never called if fake stack
    frame wasn't allocated.
  - __asan_init version is bumped to reflect changes in the ABI.
  - new flag "-asan-stack-dynamic-alloca" allows to store all the
    function local variables in a dynamic alloca, instead of the static
    one. It reduces the stack space usage in use-after-return mode
    (dynamic alloca will not be called if the local variables are stored
    in a fake stack), and improves the debug info quality for local
    variables (they will not be described relatively to %rbp/%rsp, which
    are assumed to be clobbered by function calls). This flag is turned
    off by default for now, but I plan to turn it on after more
    testing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224062 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 21:53:03 +00:00
Duncan P. N. Exon Smith
f88e4c8e91 CodeGen: Stop using LeakDetector for MachineInstr
Since `MachineInstr` is required to have a trivial destructor, it cannot
remove itself from `LeakDetection`.  Remove the calls.

As it happens, this requirement is because `MachineFunction` allocates
all `MachineInstr`s in a custom allocator; when the `MachineFunction` is
destroyed they're dropped of the edge.  There's no benefit to detecting
leaks.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224061 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 21:51:37 +00:00
Duncan P. N. Exon Smith
da75f7277e IR: Store MDNodes in a separate LeakDetector container
This gives us better leak detection messages, like `Value` has.

This also has the side effect of papering over a problem where
`MachineInstr`s are added as garbage to the leak detector and then
deleted without being removed.  If `MDNode::getTemporary()` allocates an
`MDNodeFwdDecl` in the same spot, the leak detector asserts.  By
separating `MDNode`s into their own container we lose that assertion.

Since `MachineInstr` is required to have a trivial destructor, its usage
of `LeakDetector` at all is pretty suspect.  I'll be sending a patch
soon to strip that out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224060 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 21:39:39 +00:00
Matthias Braun
5b17297b3d [CodeGen] Add print and verify pass after each MachineFunctionPass by default
Previously print+verify passes were added in a very unsystematic way, which is
annoying when debugging as you miss intermediate steps and allows bugs to stay
unnotice when no verification is performed.

To make this change practical I added the possibility to explicitely disable
verification. I used this option on all places where no verification was
performed previously (because alot of places actually don't pass the
MachineVerifier).
In the long term these problems should be fixed properly and verification
enabled after each pass. I'll enable some more verification in subsequent
commits.

This is the 2nd attempt at this after realizing that PassManager::add() may
actually delete the pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224059 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 21:26:47 +00:00
Duncan P. N. Exon Smith
966942da9e LeakDetector: Simplify code and fix comments, NFC
Rather than requiring overloads in the wrapper and the impl, just
overload the impl and use templates in the wrapper.  This makes it less
error prone to add more overloads (`void *` defeats any chance the
compiler has at noticing bugs, so the easier the better).

At the same time, correct the comment that was lying about not changing
functionality for `Value`.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224058 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 21:23:43 +00:00
David Majnemer
054eb6cba6 AsmParser: Don't crash on an ill-formed MDNodeVector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224056 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 20:51:54 +00:00
Andrea Di Biagio
f27500040b [InstCombine][X86] Improved folding of calls to Intrinsic::x86_sse4a_insertqi.
This patch teaches the instruction combiner how to fold a call to 'insertqi' if
the 'length field' (3rd operand) is set to zero, and if the sum between
field 'length' and 'bit index' (4th operand) is bigger than 64.

From the AMD64 Architecture Programmer's Manual:
1. If the sum of the bit index + length field is greater than 64, then the
   results are undefined;
2. A value of zero in the field length is defined as a length of 64.

This patch improves the existing combining logic for intrinsic 'insertqi'
adding extra checks to address both point 1. and point 2.

Differential Revision: http://reviews.llvm.org/D6583


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224054 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 20:44:59 +00:00
David Majnemer
ff3fa3dc00 AsmParser: Don't crash on an ill-formed MDNodeVector
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224053 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 20:44:09 +00:00
Rafael Espindola
0be06cf360 Remove a convoluted way of calling close by moving the call to the only caller.
As a bonus we can actually check the return value.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224046 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 20:12:55 +00:00
Rafael Espindola
428923cfe2 This reverts commit r224043 and r224042.
check-llvm was failing.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224045 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 20:03:57 +00:00
Michael Ilseman
2b7ed472a7 Silence static analyzer warnings in LLVMSupport.
The static analyzer catches a few potential bugs in LLVMSupport. Add
in asserts to silence the warnings.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224044 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 19:46:38 +00:00
Matthias Braun
e9256e340b Enable machineverifier in debug mode for X86, ARM, AArch64, Mips
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224043 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 19:42:09 +00:00
Matthias Braun
71f56c4aac [CodeGen] Add print and verify pass after each MachineFunctionPass by default
Previously print+verify passes were added in a very unsystematic way, which is
annoying when debugging as you miss intermediate steps and allows bugs to stay
unnotice when no verification is performed.

To make this change practical I added the possibility to explicitely disable
verification. I used this option on all places where no verification was
performed previously (because alot of places actually don't pass the
MachineVerifier).
In the long term these problems should be fixed properly and verification
enabled after each pass. I'll enable some more verification in subsequent
commits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224042 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 19:42:05 +00:00
Matthias Braun
9173c775e3 [CodeGen] Let MachineVerifierPass own its banner string
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224041 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 19:41:51 +00:00
Colin LeMahieu
01bc84d1fd [Hexagon] Renaming classes in preparation for replacement.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224036 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 19:01:28 +00:00
Tim Northover
c875ab329b ARM: convert isTargetIOS checks to isTargetDarwin.
The distinction is mostly useful in the front-end. By the time we get here,
there are very few situations where we actually want different behaviour for
Darwin and IOS (in fact Darwin mostly just exists in a few tests). So this
should reduce any surprising weirdness for anyone using it.

No functional change on anything anyone actually cares about.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224035 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 18:49:37 +00:00
Hal Finkel
31f6bdbbbe [PowerPC] Implement BuildSDIVPow2, lower i64 pow2 sdiv using sradi
PPCISelDAGToDAG contained existing code to lower i32 sdiv by a power-of-2 using
srawi/addze, but did not implement the i64 case. DAGCombine now contains a
callback specifically designed for this purpose (BuildSDIVPow2), and part of
the logic has been moved to an implementation of that callback. Doing this
lowering using BuildSDIVPow2 likely does not matter, compared to handling
everything in PPCISelDAGToDAG, for the positive divisor case, but the negative
divisor case, which generates an additional negation, can potentially benefit
from additional folding from DAGCombine. Now, both the i32 and the i64 cases
have been implemented.

Fixes PR20732.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224033 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 18:37:52 +00:00
Rafael Espindola
de15d01f9d Remove dead code. NFC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224029 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 17:17:26 +00:00
Cameron McInally
14273ae2e4 [AVX512] Add support for 512b variable bit shift intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224028 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 17:13:05 +00:00
Colin LeMahieu
21876d5dd5 [Hexagon] Ading i64 <- i32, i32 sextw pattern.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224027 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 17:08:21 +00:00
Colin LeMahieu
015408c6b1 [Hexagon] Adding encoding information for sign extend word instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224026 91177308-0d34-0410-b5e6-96231b3b80d8
2014-12-11 16:43:06 +00:00