Commit Graph

48 Commits

Author SHA1 Message Date
Jim Laskey
a683f9ba13 Files missing from LABEL check in.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33539 91177308-0d34-0410-b5e6-96231b3b80d8
2007-01-26 17:29:20 +00:00
Bill Wendling
f5da13367f What should be the last unnecessary <iostream>s in the library.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32333 91177308-0d34-0410-b5e6-96231b3b80d8
2006-12-07 22:21:48 +00:00
Chris Lattner
f64f9a4b75 Remove the isTwoAddress property from the CodeGenInstruction class. It should
not be used for anything other than backwards compat constraint handling.

Add support for a new DisableEncoding property which contains a list of
registers that should not be encoded by the generated code emitter.  Convert
the codeemitter generator to use this, fixing some PPC JIT regressions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31769 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-15 23:23:02 +00:00
Jeff Cohen
d41b30def3 Unbreak VC++ build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31464 91177308-0d34-0410-b5e6-96231b3b80d8
2006-11-05 19:31:28 +00:00
Chris Lattner
259bda48e2 This:
AggregateString += "\0\0";

Doesn't add two nuls to the AggregateString (for obvious reasons), which
broke the asmprinter when the first character of an asm string was not
literal text.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30625 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-27 16:44:09 +00:00
Chris Lattner
16f046a6ce Actually, name the method PrintSpecial to match other stuff in AsmPrinter.h
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30618 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-26 23:47:10 +00:00
Chris Lattner
1bf6361dfd Add support for ${:foo} syntax, where "foo" is passed into "printSpecial" and
has no associated operand.  This is useful for portably encoding stuff like
the comment character into an asm string.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30617 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-26 23:45:08 +00:00
Chris Lattner
2926869b4a Fix a long-standing wart in the code generator: two-address instruction lowering
actually *removes* one of the operands, instead of just assigning both operands
the same register.  This make reasoning about instructions unnecessarily complex,
because you need to know if you are before or after register allocation to match
up operand #'s with the target description file.

Changing this also gets rid of a bunch of hacky code in various places.

This patch also includes changes to fold loads into cmp/test instructions in
the X86 backend, along with a significant simplification to the X86 spill
folding code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30108 91177308-0d34-0410-b5e6-96231b3b80d8
2006-09-05 02:12:02 +00:00
Chris Lattner
a6dc9fb745 Fix a bug handling instructions, like blr, which just consist of a text
string.  The return value of printInstruction should be true for these.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29196 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-19 01:39:06 +00:00
Chris Lattner
195bb4a7b0 Fix case where identical cases were not detected across case #0, because
instructions not handled would have a case value of #0, throwing things off.
This marginally shrinks the X86 asmprinter, but shrinks the sparc asmwriter
by 25 lines.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29187 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-18 19:27:30 +00:00
Chris Lattner
0a01212857 Fix an accidentally duplicated line that caused tblgen to crash on itanium.
Add an assert that catches the real problem earlier.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29185 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-18 19:06:01 +00:00
Chris Lattner
96c1ade5c3 Maximally group commands. When all instructions within a command set have a
series of identical commands, handle them all with one switch.  In the case
of the x86 at&t asm printer, only 3 switches are needed for all instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29184 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-18 18:28:27 +00:00
Chris Lattner
b84628679a Change generator to remove operands as it processes them. No change in
generated file.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29183 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-18 17:56:07 +00:00
Chris Lattner
191dd1f186 Handle the last operand more intelligently. When emitting the \n, also
return from the asmprinter to make the generated asmprinter both more
efficient and smaller.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29182 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-18 17:50:22 +00:00
Chris Lattner
e7a589df09 Emit switches with 1/2 cases as unconditional code or an if/then/else for
tidyness.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29181 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-18 17:43:54 +00:00
Chris Lattner
b51ecd4dd9 Steal bits from the asm string index to use for operand information. On both
x86 and ppc, this gets us 4 more bits to play with, since the string indices
both only use 12 bits.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29180 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-18 17:38:46 +00:00
Chris Lattner
5561640043 Merge operand info and asmstr idx into a single 32-bit field. No other change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29179 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-18 17:32:27 +00:00
Chris Lattner
bdff5f95b9 Completely change the structure of the generated asmprinter to be more table
based and less switch-statements-with-hundreds-of-cases based.  This shrinks
the x86 asmprinters to about 1/3 their previous size.

Other improvements coming.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29177 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-18 17:18:03 +00:00
Chris Lattner
fb5115e84c The generated index array should be const.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29155 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-14 23:14:02 +00:00
Chris Lattner
6af022f255 Emit the string information for the asm writer as a single large string
and index into it, instead of emitting it like this:

  static const char * const OpStrs[] = {
    "PHINODE\n",        // PHI
    0,  // INLINEASM
    "adc ",     // ADC32mi
    "adc ",     // ADC32mi8
   ...

The old way required thousands of relocations that slows down link time and
dynamic load times.

This also cuts about 10K off each of the X86 asmprinters, and should shrink
the others as well.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29152 91177308-0d34-0410-b5e6-96231b3b80d8
2006-07-14 22:59:11 +00:00
Chris Lattner
a1e8a80b96 instructions can be in different namespaces. Make sure to use the right
one for each instruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28038 91177308-0d34-0410-b5e6-96231b3b80d8
2006-05-01 17:01:17 +00:00
Chris Lattner
04cadb3684 Add support for modifier strings in machine instr descriptions. This allows
us to avoid creating lots of "Operand" types with different printers, instead
we can fold several together and use modifiers.  For example, we can now use:

${target:call} to say that the operand should be printed like a 'call' operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26024 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-06 23:40:48 +00:00
Chris Lattner
b03b080a82 Simplify the variant handling code, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26023 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-06 22:43:28 +00:00
Chris Lattner
1cf9d961b2 add a note, ya knoe
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25880 91177308-0d34-0410-b5e6-96231b3b80d8
2006-02-01 19:12:23 +00:00
Chris Lattner
0cfcc1e807 Use printInlineAsm to, well, print inline asm's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25677 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 02:10:50 +00:00
Nate Begeman
391c5d231a No longer track value types for asm printer operands, and remove them as
an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24541 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 18:54:35 +00:00
Jeff Cohen
00b16889ab Eliminate all remaining tabs and trailing spaces.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22523 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-27 06:12:32 +00:00
Chris Lattner
3e3def9c19 Fix PR595: These error messages should not be looking at CGI.Name, they
should be looking at CGI.TheDef->getName().


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22445 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-15 22:43:04 +00:00
Nate Begeman
afc545616a Add support for a TODO; instructions in .td files can now have arguments
printed as part of the opcode.  This allows something like
cmp${cc}ss in the x86 backed to be printed as cmpltss, cmpless, etc.
depending on what the value of $cc is.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22439 91177308-0d34-0410-b5e6-96231b3b80d8
2005-07-14 22:50:30 +00:00
Misha Brukman
3da94aec4d Remove trailing whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21428 91177308-0d34-0410-b5e6-96231b3b80d8
2005-04-22 00:00:37 +00:00
Chris Lattner
131ca38c60 Minor fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19761 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 20:59:38 +00:00
Chris Lattner
38c0751a12 This is the final big of factoring. This shares cases in suboperand
differences, which means that identical instructions (after stripping off
the first literal string) do not run any different code at all.  On the X86,
this turns this code:

    switch (MI->getOpcode()) {
    case X86::ADC32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::ADC32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::ADC32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::ADD32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::ADD32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::ADD32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::AND32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::AND32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::AND32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::CMP32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::CMP32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::MOV32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::MOV32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::OR32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::OR32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::OR32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::ROL32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::ROR32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::SAR32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::SBB32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::SBB32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::SBB32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::SHL32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::SHLD32mrCL: printOperand(MI, 4, MVT::i32); break;
    case X86::SHR32mi: printOperand(MI, 4, MVT::i8); break;
    case X86::SHRD32mrCL: printOperand(MI, 4, MVT::i32); break;
    case X86::SUB32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::SUB32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::SUB32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::TEST32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::TEST32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::TEST8mi: printOperand(MI, 4, MVT::i8); break;
    case X86::XCHG32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::XOR32mi: printOperand(MI, 4, MVT::i32); break;
    case X86::XOR32mi8: printOperand(MI, 4, MVT::i8); break;
    case X86::XOR32mr: printOperand(MI, 4, MVT::i32); break;
    }

into this:

    switch (MI->getOpcode()) {
    case X86::ADC32mi:
    case X86::ADC32mr:
    case X86::ADD32mi:
    case X86::ADD32mr:
    case X86::AND32mi:
    case X86::AND32mr:
    case X86::CMP32mi:
    case X86::CMP32mr:
    case X86::MOV32mi:
    case X86::MOV32mr:
    case X86::OR32mi:
    case X86::OR32mr:
    case X86::SBB32mi:
    case X86::SBB32mr:
    case X86::SHLD32mrCL:
    case X86::SHRD32mrCL:
    case X86::SUB32mi:
    case X86::SUB32mr:
    case X86::TEST32mi:
    case X86::TEST32mr:
    case X86::XCHG32mr:
    case X86::XOR32mi:
    case X86::XOR32mr: printOperand(MI, 4, MVT::i32); break;
    case X86::ADC32mi8:
    case X86::ADD32mi8:
    case X86::AND32mi8:
    case X86::OR32mi8:
    case X86::ROL32mi:
    case X86::ROR32mi:
    case X86::SAR32mi:
    case X86::SBB32mi8:
    case X86::SHL32mi:
    case X86::SHR32mi:
    case X86::SUB32mi8:
    case X86::TEST8mi:
    case X86::XOR32mi8: printOperand(MI, 4, MVT::i8); break;
    }

After this, the generated asmwriters look pretty much as though they were
generated by hand.  This shrinks the X86 asmwriter.inc files from 55101->39669
and 55429->39551 bytes each, and PPC from 16766->12859 bytes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19760 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 20:31:17 +00:00
Chris Lattner
f876668518 Implement *even more* factoring. In particular, if all of the instruction
strings starts out with a constant string, we emit the string first, using
a table lookup (instead of a switch statement).

Because this is usually the opcode portion of the asm string, the differences
between the instructions have now been greatly reduced.  This allows many
more case statements to be grouped together.

This patch also allows instruction cases to be grouped together when the
instruction patterns are exactly identical (common after the opcode string
has been ripped off), and when the differing operand is a MachineInstr
operand that needs to be formatted.

The end result of this is a mean and lean generated AsmPrinter!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19759 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 19:22:23 +00:00
Jeff Cohen
615ed993e1 Fix VC++ compilation error
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19757 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 18:50:10 +00:00
Chris Lattner
870c016934 Implement factoring of instruction pattern strings. In particular, instead of
emitting code like this:

  case PPC::ADD: O  << "add ";  printOperand(MI, 0, MVT::i64); O  << ", ";  prin
tOperand(MI, 1, MVT::i64); O  << ", ";  printOperand(MI, 2, MVT::i64); O  << '\n
'; break;
  case PPC::ADDC: O  << "addc ";  printOperand(MI, 0, MVT::i64); O  << ", ";  pr
intOperand(MI, 1, MVT::i64); O  << ", ";  printOperand(MI, 2, MVT::i64); O  << '
\n'; break;
  case PPC::ADDE: O  << "adde ";  printOperand(MI, 0, MVT::i64); O  << ", ";  pr
intOperand(MI, 1, MVT::i64); O  << ", ";  printOperand(MI, 2, MVT::i64); O  << '
\n'; break;
...

Emit code like this:

  case PPC::ADD:
  case PPC::ADDC:
  case PPC::ADDE:
  ...
    switch (MI->getOpcode()) {
    case PPC::ADD: O << "add "; break;
    case PPC::ADDC: O << "addc "; break;
    case PPC::ADDE: O << "adde "; break;
    ...
    }
    printOperand(MI, 0, MVT::i64);
    O << ", ";
    printOperand(MI, 1, MVT::i64);
    O << ", ";
    printOperand(MI, 2, MVT::i64);
    O << "\n";
    break;

This shrinks the PPC asm writer from 24785->15205 bytes (even though the new
asmwriter has much more whitespace than the old one), and the X86 printers shrink
quite a bit too.  The important implication of this is that GCC no longer hits swap
when building the PPC backend in optimized mode.  Thus this fixes PR448.

-Chris


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19755 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 18:38:13 +00:00
Chris Lattner
f11ad9ef46 Fix the ::: problem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19754 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 18:18:59 +00:00
Chris Lattner
5765dba5ce Minor refactoring, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19753 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 17:40:38 +00:00
Chris Lattner
b0b55e74a0 Seperate asmstring parsing from emission. This allows the code to be simpler
and more understandable.  It also allows us to do simple things like fold
consequtive literal strings together.  For example, instead of emitting this
for the X86 backend:

  O  << "adc" << "l" << " ";

we now generate this:

  O << "adcl ";

*whoa* :)

This shrinks the X86 asmwriters from 62729->58267 and 65176->58644 bytes
for the intel/att asm writers respectively.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19749 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 17:32:42 +00:00
Andrew Lenharth
2202bfa5a3 make double-dollar properly escape asmstrings
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19740 91177308-0d34-0410-b5e6-96231b3b80d8
2005-01-22 00:35:22 +00:00
Chris Lattner
9d990a01a9 Don't emit the method into the llvm namespace, let the #includer decide where it goes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16934 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-12 16:21:18 +00:00
Chris Lattner
953c6fe112 Correctly parse variant notation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@16637 91177308-0d34-0410-b5e6-96231b3b80d8
2004-10-03 20:19:02 +00:00
Chris Lattner
2c38413b3f Do not #include files into the llvm namespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15849 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-17 03:08:28 +00:00
Chris Lattner
175580c0f3 Make the AsmWriter a first-class tblgen object. Allow targets to specify
name of the generated asmwriter class, and the name of the format string.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15747 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-14 22:50:53 +00:00
Chris Lattner
9302ba416b Fix minor bug in previous checkin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15649 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 04:08:36 +00:00
Chris Lattner
1caef2c0a9 change how we invoke the printer. Instead of passing in the MO directly,
pass in the MI, operand number, and the type of the operand.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15645 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-11 02:23:23 +00:00
Chris Lattner
c3d5f3e12a Be picky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15400 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 08:55:34 +00:00
Chris Lattner
076efa771a Add support for asm printing machine instructions that have operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15391 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 07:43:02 +00:00
Chris Lattner
2e1f51b8a5 Initial cut at an asm writer emitter. So far, this only handles emission of
instructions, and only instructions that take no operands at that!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@15386 91177308-0d34-0410-b5e6-96231b3b80d8
2004-08-01 05:59:33 +00:00