Evan Cheng
f9fc25db32
Fix another bug related to chain / flag.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24868 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 22:40:04 +00:00
Evan Cheng
1b80f4d2c6
Fixes for a number of bugs: save flag results in CodeGenMap, folded chains
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may not all have ResNo == 0.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24858 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-19 07:18:51 +00:00
Chris Lattner
5216c698de
Handle basic block nodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24833 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 21:05:44 +00:00
Chris Lattner
dc464de9b0
More fixes for Selection of copyto/fromreg with a flag
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24829 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 15:45:51 +00:00
Chris Lattner
755dd09815
Select copytoreg and copyfromreg nodes that have flag operands correctly.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24827 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-18 15:28:25 +00:00
Evan Cheng
bcecf33dc2
Support for read / write from explicit registers with FlagVT type.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24753 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-17 01:19:28 +00:00
Evan Cheng
58e84a69f5
Added support to specify predicates.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24715 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 22:02:59 +00:00
Evan Cheng
01f318bfca
Skip over srcvalue nodes when generating ISEL code.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24704 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-14 02:21:57 +00:00
Evan Cheng
0e65b27e28
Bug fix: CodeGenMap[N] = ... -> CodeGenMap[N.getValue(0)] = ...
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24680 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 23:45:21 +00:00
Evan Cheng
481c8e0501
At top of generated isel SelectCode() is this:
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if (!N.Val->hasOneUse()) {
std::map<SDOperand, SDOperand>::iterator CGMI = CodeGenMap.find(N);
if (CGMI != CodeGenMap.end()) return CGMI->second;
}
Suppose a DAG like this:
X
^ ^
/ \
USE1 USE2
Suppose USE1 is being selected first and during which X is selected and
returned a new node. After this, USE1 is no longer an use of X. During USE2
selection, X will be selected again since it has only one use!
The fix is to always query CodeGenMap.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24679 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 23:22:48 +00:00
Evan Cheng
8621789fcc
Bug fix: finding the correct incoming chain for pattern with nested src operand. And a minor change to make output code slightly more readible.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24669 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-12 19:37:43 +00:00
Nate Begeman
28a6b02626
Add support for TargetConstantPool nodes to the dag isel emitter, and use
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them in the PPC backend, to simplify some logic out of Select and
SelectAddr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24657 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 02:36:00 +00:00
Evan Cheng
ba7fa0b5d4
Stop emitting a redudant type check for complex pattern node.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24655 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 01:57:33 +00:00
Evan Cheng
1129e87ff4
For instructions which produce no result, e.g. store, chain's Resno == 0.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24652 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-10 00:09:17 +00:00
Chris Lattner
5b21be76e1
Add a new SDTCisPtrTy constraint, which indicates that an operand must have
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the same type as the pointer type for a target.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24649 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 22:57:42 +00:00
Evan Cheng
b915f3110d
* Do not allow nodes which produce chain results (e.g. loads) to be folded if
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it has more than one real use (non-chain uses).
* Record folded chain producing node in CodeGenMap.
* Do not fold a chain producing node if it has already been selected as an
operand of a chain use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24647 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 22:45:35 +00:00
Evan Cheng
cbc09c8eaa
Prevent folding of instructions which produce chains that have more than 1 real use
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24643 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 06:06:08 +00:00
Evan Cheng
c45146ace5
* Make sure complex pattern operands are selected first since their select
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functions can return false and causing the instruction pattern match to fail.
* Code clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24642 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-09 00:48:42 +00:00
Evan Cheng
3aa39f439a
* Added an explicit type field to ComplexPattern.
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* Renamed MatchingNodes to RootNodes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24636 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 02:14:08 +00:00
Evan Cheng
0fc7198890
Added support for ComplexPattern. These are patterns that require C++ pattern
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matching code that is not currently auto-generated by tblgen, e.g. X86
addressing mode. Selection routines for complex patterns can return multiple operands, e.g. X86 addressing mode returns 4.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24634 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-08 02:00:36 +00:00
Evan Cheng
dd304dd4bd
* Infer instruction property hasCtrlDep from pattern if it has one.
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* Fixed a bug related to hasCtrlDep property use.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24610 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 23:08:55 +00:00
Chris Lattner
22faeabb3a
Implement PR673: for explicit register references, use type information
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if available
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24597 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 02:36:37 +00:00
Chris Lattner
7292c5ee32
Generate code to silence bogus GCC warnings.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24593 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-05 00:48:51 +00:00
Evan Cheng
1c3d19eb15
* Commit the fix (by Chris) for a tblgen type inferencing bug.
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* Enhanced tblgen to handle instructions which have chain operand and writes a
chain result.
* Enhanced tblgen to handle instructions which produces no results. Part of
the change is a temporary hack which relies on instruction property (e.g.
isReturn, isBranch). The proper fix would be to change the .td syntax to
separate results dag from ops dag.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24587 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-04 08:18:16 +00:00
Nate Begeman
6510b22cec
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
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work. This change has no effect on generated code.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24563 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 04:51:06 +00:00
Evan Cheng
66a48bbc35
Teach tblgen to accept register source operands in patterns, e.g.
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def SHL8rCL : I<0xD2, MRM4r, (ops R8 :$dst, R8 :$src),
"shl{b} {%cl, $dst|$dst, %CL}",
[(set R8:$dst, (shl R8:$src, CL))]>, Imp<[CL],[]>;
This generates a CopyToReg operand and added its 2nd result to the shl as
a flag operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24557 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 00:18:45 +00:00
Nate Begeman
ddb395463c
Stop checking the ValueType of the CodeGenInstruction. Instead, use the
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ValueType from the RegisterClass or Operands. This step is necessary to
allow RegisterClasses to have multiple ValueTypes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24555 91177308-0d34-0410-b5e6-96231b3b80d8
2005-12-01 00:06:14 +00:00
Chris Lattner
5d28ffdfec
Make the code generated by tblgen return the result of SelectNodeTo, to
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permit future changes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24553 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-30 23:08:45 +00:00
Evan Cheng
76021f010b
Better error message when unrecognized opcode is seen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24519 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-29 18:44:58 +00:00
Chris Lattner
09c033962b
Validate that the input to 'Pat' patterns is sane.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24393 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 17:43:52 +00:00
Chris Lattner
b120a64e13
teach tblgen to be smart enough to handle tglobaladdr nodes
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24391 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-17 07:39:45 +00:00
Chris Lattner
12cf9090a4
fix a tblgen bug that Evan ran into, where we would lose the '$src' name
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on patterns like "(set R32:$dst, (i32 imm:$src))"
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24383 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-16 23:14:54 +00:00
Chris Lattner
465c737467
Reject integer literals that are out of range for their type.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24162 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-03 05:46:11 +00:00
Chris Lattner
0614b628cf
Add support for immediates directly in the pattern, this allows itanium to
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define:
def : Pat<(i1 1), (CMPEQ r0, r0)>;
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24149 91177308-0d34-0410-b5e6-96231b3b80d8
2005-11-02 06:49:14 +00:00
Chris Lattner
9d1a02345c
Make negative immediates in patterns work correctly, silence some warnings
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building the itanium backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24095 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-29 16:39:40 +00:00
Chris Lattner
b0e103d46b
Rename Record::getValueAsListDef to getValueAsListOfDefs, to more accurately
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reflect what it is.
Convert some more code over to use it.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24072 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 22:49:02 +00:00
Chris Lattner
6bc0d742c2
Use the new interface Jim added
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24071 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-28 22:43:25 +00:00
Chris Lattner
a7ad198f89
Condcodes are in the ISD namespace
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24010 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-26 17:02:02 +00:00
Chris Lattner
1531f2025c
Add support for CondCode's
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24008 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-26 16:59:37 +00:00
Chris Lattner
f071bb5b87
Emit some boilerplate for targets
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23983 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-25 20:35:14 +00:00
Chris Lattner
edbd8711de
Make tblgen emit:
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tblgen: In ZAPNOTi: Cannot use 'IZAPX' in an input pattern!
for a bad pattern, instead of an ugly assertion.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23854 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-21 01:19:59 +00:00
Chris Lattner
2f041d49a9
add support for literal immediates in patterns to match, allowing us to
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write things like this:
def : Pat<(add GPRC:$in, 12),
(ADD12 GPRC:$in)>;
Andrew: if this isn't enough or doesn't work for you, please lemme know.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23819 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 04:41:05 +00:00
Chris Lattner
5d5a056092
Add basic support for integer constants in pattern results.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23817 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 04:30:56 +00:00
Chris Lattner
4c59309f59
Add support for patterns that have physical registers in them. Testcase:
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def : Pat<(trunc G8RC:$in),
(OR8To4 G8RC:$in, X0)>;
Even though this doesn't make any sense on PPC :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23815 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 02:07:26 +00:00
Chris Lattner
ab1bf27be5
Asserting here is to violent
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23814 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 01:55:23 +00:00
Chris Lattner
0c0cfa741f
Nate wants to define 'Pat's which turn into instructions that don't have
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patterns. Certainly a logical request.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23810 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-19 01:27:22 +00:00
Chris Lattner
b277cbc087
Duraid pointed out that it is impolite to emit PPC:: into the IA64 backend
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23780 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-18 04:41:01 +00:00
Chris Lattner
5024d93c8b
Make the generated code significantly more memory efficient, by using
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SelectNodeTo instead of getTargetNode when possible.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23758 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-16 01:41:58 +00:00
Chris Lattner
7e82f1322c
Implement the last major missing piece in the DAG isel generator: when emitting
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a pattern match, make sure to emit the (minimal number of) type checks that
verify the pattern matches this specific instruction. This allows FMA32
patterns to not match double expressions for example.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23748 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-15 21:34:21 +00:00
Chris Lattner
603d78c9de
Now that we have int/fp lattice values, implement the SDTCisOpSmallerThanOp
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type constraint. This lets tblgen realize that it doesn't need any dynamic
type checks for fextend/fround on PPC (and many other targets), because there
are only two fp types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23730 91177308-0d34-0410-b5e6-96231b3b80d8
2005-10-14 06:25:00 +00:00