Chris Lattner
fb5b11046b
If a target doesn't have HasMULHU or HasUMUL_LOHI, ExpandOp would return
...
without lo/hi set. Fall through to making a libcall instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42969 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 18:35:05 +00:00
Neil Booth
e5e0194583
Consolidate logic for creating NaNs. Silence compiler warning.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42966 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 10:39:51 +00:00
Neil Booth
caf19d79e5
Whether arithmetic is supported is a property of the semantics. Make it
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so, and clean up the checks by putting them in an inline function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42965 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 10:29:28 +00:00
Neil Booth
1870f29c6c
Separate out parsing of decimal number. Use this to only allocate
...
memory for the significand once up-front. Also ignore insignificant
trailing zeroes; this saves unnecessary multiplications later.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42964 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 10:16:12 +00:00
Evan Cheng
3644601563
Unbreak x86-64.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42962 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 10:09:39 +00:00
Evan Cheng
34729256e8
When coalescing an EXTRACT_SUBREG and the dst register is a physical register,
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the source register will be coalesced to the super register of the LHS. Properly
merge in the live ranges of the resulting coalesced interval that were part of
the original source interval to the live interval of the super-register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42961 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 10:08:34 +00:00
Evan Cheng
347d39f1fd
Revert 42908 for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42960 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 05:57:21 +00:00
Dale Johannesen
296c176141
Fix type mismatch error in PPC Altivec (only causes
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a problem when asserts are on). From vecLib.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42959 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 01:58:32 +00:00
Dale Johannesen
5927d8e94d
Disable some compile-time optimizations on PPC
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long double.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42958 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-14 01:56:47 +00:00
Duncan Sands
7fef59f7e5
Clarify that fastcc has a problem with nested function
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trampolines, rather than with nested functions themselves.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42955 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-13 07:38:37 +00:00
Chris Lattner
e33544ce55
Enhance the truncstore optimization code to handle shifted
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values and propagate demanded bits through them in simple cases.
This allows this code:
void foo(char *P) {
strcpy(P, "abc");
}
to compile to:
_foo:
ldrb r3, [r1]
ldrb r2, [r1, #+1]
ldrb r12, [r1, #+2]!
ldrb r1, [r1, #+1]
strb r1, [r0, #+3]
strb r2, [r0, #+1]
strb r12, [r0, #+2]
strb r3, [r0]
bx lr
instead of:
_foo:
ldrb r3, [r1, #+3]
ldrb r2, [r1, #+2]
orr r3, r2, r3, lsl #8
ldrb r2, [r1, #+1]
ldrb r1, [r1]
orr r2, r1, r2, lsl #8
orr r3, r2, r3, lsl #16
strb r3, [r0]
mov r2, r3, lsr #24
strb r2, [r0, #+3]
mov r2, r3, lsr #16
strb r2, [r0, #+2]
mov r3, r3, lsr #8
strb r3, [r0, #+1]
bx lr
testcase here: test/CodeGen/ARM/truncstore-dag-combine.ll
This also helps occasionally for X86 and other cases not involving
unaligned load/stores.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42954 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-13 06:58:48 +00:00
Chris Lattner
2b4c279a8e
Add a simple optimization to simplify the input to
...
truncate and truncstore instructions, based on the
knowledge that they don't demand the top bits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42952 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-13 06:35:54 +00:00
Neil Booth
d1a23d573d
If the power of 5 is exact, and the reciprocal exact, the error is zero not one half-ulps. This prevents an infinite loop in rare cases.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42950 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-13 03:34:08 +00:00
Evan Cheng
7f56625447
Local spiller optimization:
...
Turn this:
movswl %ax, %eax
movl %eax, -36(%ebp)
xorl %edi, -36(%ebp)
into
movswl %ax, %eax
xorl %edi, %eax
movl %eax, -36(%ebp)
by unfolding the load / store xorl into an xorl and a store when we know the
value in the spill slot is available in a register. This doesn't change the
number of instructions but reduce the number of times memory is accessed.
Also unfold some load folding instructions and reuse the value when similar
situation presents itself.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42947 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-13 02:50:24 +00:00
Evan Cheng
106e8020bd
Change unfoldMemoryOperand(). User is now responsible for passing in the
...
register used by the unfolded instructions. User can also specify whether to
unfold the load, the store, or both.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42946 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-13 02:35:06 +00:00
Evan Cheng
fa9457276a
Optionally create a MachineInstr without default implicit operands.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42945 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-13 02:23:01 +00:00
Arnold Schwaighofer
92226dd19f
Correcting the corrections. Bad bad baaad emacs!
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42935 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 21:53:12 +00:00
Arnold Schwaighofer
48abc5cf6b
Corrected many typing errors. And removed 'nest' parameter handling
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for fastcc from X86CallingConv.td. This means that nested functions
are not supported for calling convention 'fastcc'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42934 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 21:30:57 +00:00
Devang Patel
7b9e1d251f
Dest type is always i8 *. This allows some simplification.
...
Do not filter memmove.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42930 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 20:10:21 +00:00
Duncan Sands
2e4d675d93
Due to the new tail call optimization, trampolines can no
...
longer be created for fastcc functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42925 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 19:37:31 +00:00
Dale Johannesen
f646774edd
ppc long double. Implement fabs and fneg.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42924 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 19:02:17 +00:00
Evan Cheng
1c5d83c14e
Update.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42922 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 18:22:55 +00:00
Chris Lattner
a79dd432b3
Fix a bug in my patch last night that broke InstCombine/2007-10-12-Crash.ll
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42920 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 18:05:47 +00:00
Dale Johannesen
6e63e09236
Implement i64->ppcf128 conversions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42919 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 17:52:03 +00:00
Evan Cheng
48ff282dd4
Did mean to leave this in. INSERT_SUBREG isn't being coalesced yet.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42916 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 17:16:50 +00:00
Neil Booth
6ac7016eb1
Remove duplicate comment.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42913 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 16:05:57 +00:00
Neil Booth
96c7471b39
Implement correctly-rounded decimal->binary conversion, i.e. conversion
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from user input strings.
Such conversions are more intricate and subtle than they may appear;
it is unlikely I have got it completely right first time. I would
appreciate being informed of any bugs and incorrect roundings you
might discover.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42912 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 16:02:31 +00:00
Neil Booth
5b8e0c5fd3
Remove a field that was never used.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42911 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 15:35:10 +00:00
Neil Booth
7a951ca548
If we're trying to be arbitrary precision, unsigned char clearly won't cut it. Needed for dec->bin conversions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42910 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 15:33:27 +00:00
Neil Booth
1e8390d8d6
Don't attempt to mask no bits
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42909 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 15:31:31 +00:00
Dan Gohman
8ddde0a151
Change the names used for internal labels to use the current
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function symbol name instead of a codegen-assigned function
number.
Thanks Evan! :-)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42908 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 14:53:36 +00:00
Dan Gohman
a9b511187b
Fix some corner cases with vectors in copyToRegs and copyFromRegs.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42907 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 14:33:11 +00:00
Dan Gohman
9e04c82c0e
Add support to SplitVectorOp for powi, where the second operand
...
is a scalar integer.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42906 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 14:13:46 +00:00
Dan Gohman
f0d0089340
Mark vector ctpop, cttz, and ctlz as Expand on x86.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42905 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 14:09:42 +00:00
Dan Gohman
a3f269f7f6
Mark vector pow, ctpop, cttz, and ctlz as Expand on PowerPC.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42904 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 14:08:57 +00:00
Evan Cheng
52c7ff7067
Restrict EXTRACT_SUBREG coalescing to avoid negative performance impact.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42903 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 09:15:53 +00:00
Evan Cheng
32dfbeada7
EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like
...
(almost) a register copy. However, it always coalesced to the register of the
RHS (the super-register). All uses of the result of a EXTRACT_SUBREG are sub-
register uses which adds subtle complications to load folding, spiller rewrite,
etc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42899 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 08:50:34 +00:00
Evan Cheng
10136e7c7f
Some clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42898 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 08:45:27 +00:00
Evan Cheng
f4a9c69ff6
Fold load / store into MOV32to32_ and MOV16to16_.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42895 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 08:38:01 +00:00
Evan Cheng
96aaa54529
Flag MOV32to32_ with EXTRACT_SUBREG. They should not be scheduled apart.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42894 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 07:55:53 +00:00
Gabor Greif
f3cdf3e3ec
eliminate warning
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42892 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 07:44:54 +00:00
Chris Lattner
6a94de2990
Fix some 80 column violations.
...
Fix DecomposeSimpleLinearExpr to handle simple constants better.
Don't nuke gep(bitcast(allocation)) if the bitcast(allocation) will
fold the allocation. This fixes PR1728 and Instcombine/malloc3.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42891 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 05:30:59 +00:00
Dale Johannesen
ca68aaa0e5
PPC long double. Implement a couple more conversions.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42888 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 01:37:08 +00:00
Dan Gohman
ac9385a555
Add intrinsics for sin, cos, and pow. These use llvm_anyfloat_ty, and so
...
may be overloaded with vector types. And add a testcase for codegen for
these.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42885 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-12 00:01:22 +00:00
Dan Gohman
8266952813
Codegen support for vector intrinsics.
...
Factor out the code that expands the "nasty scalar code" for unrolling
vectors into a separate routine, teach it how to handle mixed
vector/scalar operands, as seen in powi, and use it for several operators,
including sin, cos, powi, and pow.
Add support in SplitVectorOp for fpow, fpowi and for several unary
operators.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42884 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 23:57:53 +00:00
Dale Johannesen
fcf4d24ffb
Implement ppc long double->uint conversion.
...
Make ppc long double constants print.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42882 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 23:32:15 +00:00
Dan Gohman
f96e4de403
Set ISD::FPOW to Expand.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42881 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 23:21:31 +00:00
Dan Gohman
e54be10418
Add runtime library names for pow.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42880 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 23:09:10 +00:00
Dan Gohman
07f04fd574
Add an ISD::FPOW node type.
...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42879 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 23:06:37 +00:00
Dale Johannesen
83e105c600
Add missing argument to PALIGNR
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42874 91177308-0d34-0410-b5e6-96231b3b80d8
2007-10-11 20:58:37 +00:00