Commit Graph

10 Commits

Author SHA1 Message Date
Matt Arsenault
2b6e6fc1a8 R600/SI: Add intrinsics for brev instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211187 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-18 17:13:57 +00:00
Tom Stellard
ff8dc48da3 R600/SI: Add a pattern for llvm.AMDGPU.barrier.global
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211109 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-17 16:53:09 +00:00
Matt Arsenault
00c3986254 R600: Mostly remove remaining AMDIL intrinsics.
Delete all unused ones, and add new AMDGPU named intrinsics for
the ones that are. Handle the old AMDIL names for comptability (although
remove their GCCBuiltin names) and add tests since there weren't any
for these before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210827 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-12 21:15:44 +00:00
Matt Arsenault
8a9df8f92c R600/SI: Use v_cvt_f32_ubyte* instructions
This eliminates extra extract instructions when loading an i8 vector to
a float vector.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210666 91177308-0d34-0410-b5e6-96231b3b80d8
2014-06-11 17:50:44 +00:00
Matt Arsenault
f49da4338a R600: Add intrinsics for mad24
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209456 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-22 18:00:15 +00:00
Matt Arsenault
5049ca67c2 R600: Add mul24 intrinsics
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208604 91177308-0d34-0410-b5e6-96231b3b80d8
2014-05-12 17:49:57 +00:00
Matt Arsenault
828bfc7350 R600: Add BFE, BFI, and BFM intrinsics to help with writing tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205236 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-31 18:21:18 +00:00
Tom Stellard
cedcfee405 R600: Add support for GROUP_BARRIER instruction
Reviewed-by: Vincent Lejeune<vljn at ovi.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185161 91177308-0d34-0410-b5e6-96231b3b80d8
2013-06-28 15:46:59 +00:00
Christian Konig
c3c169c884 R600/SI: remove shader type intrinsic
Just encode the type as target specific attribute.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176622 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-07 09:03:46 +00:00
Tom Stellard
f98f2ce29e Add R600 backend
A new backend supporting AMD GPUs: Radeon HD2XXX - HD7XXX

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169915 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-11 21:25:42 +00:00