//==-- MSP430ISelLowering.h - MSP430 DAG Lowering Interface ------*- C++ -*-==// // // The LLVM Compiler Infrastructure // // This file is distributed under the University of Illinois Open Source // License. See LICENSE.TXT for details. // //===----------------------------------------------------------------------===// // // This file defines the interfaces that MSP430 uses to lower LLVM code into a // selection DAG. // //===----------------------------------------------------------------------===// #ifndef LLVM_TARGET_MSP430_ISELLOWERING_H #define LLVM_TARGET_MSP430_ISELLOWERING_H #include "MSP430.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/Target/TargetLowering.h" namespace llvm { namespace MSP430ISD { enum { FIRST_NUMBER = ISD::BUILTIN_OP_END, /// Return with a flag operand. Operand 0 is the chain operand. RET_FLAG, /// Y = R{R,L}A X, rotate right (left) arithmetically RRA, RLA, /// Y = RRC X, rotate right via carry RRC, /// CALL - These operations represent an abstract call /// instruction, which includes a bunch of information. CALL, /// Wrapper - A wrapper node for TargetConstantPool, TargetExternalSymbol, /// and TargetGlobalAddress. Wrapper, /// CMP - Compare instruction. CMP, /// SetCC. Operand 0 is condition code, and operand 1 is the flag /// operand produced by a CMP instruction. SETCC, /// MSP430 conditional branches. Operand 0 is the chain operand, operand 1 /// is the block to branch if condition is true, operand 2 is the /// condition code, and operand 3 is the flag operand produced by a CMP /// instruction. BR_CC, /// SELECT_CC. Operand 0 and operand 1 are selection variable, operand 3 /// is condition code and operand 4 is flag operand. SELECT_CC }; } class MSP430Subtarget; class MSP430TargetMachine; class MSP430TargetLowering : public TargetLowering { public: explicit MSP430TargetLowering(MSP430TargetMachine &TM); /// LowerOperation - Provide custom lowering hooks for some operations. virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG); /// getTargetNodeName - This method returns the name of a target specific /// DAG node. virtual const char *getTargetNodeName(unsigned Opcode) const; /// getFunctionAlignment - Return the Log2 alignment of this function. virtual unsigned getFunctionAlignment(const Function *F) const; SDValue LowerShifts(SDValue Op, SelectionDAG &DAG); SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG); SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG); SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG); SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG); SDValue LowerSIGN_EXTEND(SDValue Op, SelectionDAG &DAG); TargetLowering::ConstraintType getConstraintType(const std::string &Constraint) const; std::pair getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const; MachineBasicBlock* EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *BB, DenseMap *EM) const; private: SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl &Outs, const SmallVectorImpl &Ins, DebugLoc dl, SelectionDAG &DAG, SmallVectorImpl &InVals); SDValue LowerCCCArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl &Ins, DebugLoc dl, SelectionDAG &DAG, SmallVectorImpl &InVals); SDValue LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl &Ins, DebugLoc dl, SelectionDAG &DAG, SmallVectorImpl &InVals); virtual SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl &Ins, DebugLoc dl, SelectionDAG &DAG, SmallVectorImpl &InVals); virtual SDValue LowerCall(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl &Outs, const SmallVectorImpl &Ins, DebugLoc dl, SelectionDAG &DAG, SmallVectorImpl &InVals); virtual SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl &Outs, DebugLoc dl, SelectionDAG &DAG); virtual bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, SDValue &Base, SDValue &Offset, ISD::MemIndexedMode &AM, SelectionDAG &DAG) const; const MSP430Subtarget &Subtarget; const MSP430TargetMachine &TM; }; } // namespace llvm #endif // LLVM_TARGET_MSP430_ISELLOWERING_H