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https://github.com/c64scene-ar/llvm-6502.git
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cd52a7a381
Apparently, the style needs to be agreed upon first. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240390 91177308-0d34-0410-b5e6-96231b3b80d8
465 lines
17 KiB
C++
465 lines
17 KiB
C++
//===- HexagonMCInstrInfo.cpp - Hexagon sub-class of MCInst ---------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This class extends MCInstrInfo to allow Hexagon specific MCInstr queries
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//
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//===----------------------------------------------------------------------===//
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#include "HexagonMCInstrInfo.h"
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#include "Hexagon.h"
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#include "HexagonBaseInfo.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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namespace llvm {
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iterator_range<MCInst::const_iterator>
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HexagonMCInstrInfo::bundleInstructions(MCInst const &MCI) {
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assert(isBundle(MCI));
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return iterator_range<MCInst::const_iterator>(
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MCI.begin() + bundleInstructionsOffset, MCI.end());
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}
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size_t HexagonMCInstrInfo::bundleSize(MCInst const &MCI) {
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if (HexagonMCInstrInfo::isBundle(MCI))
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return (MCI.size() - bundleInstructionsOffset);
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else
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return (1);
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}
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void HexagonMCInstrInfo::clampExtended(MCInstrInfo const &MCII, MCInst &MCI) {
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assert(HexagonMCInstrInfo::isExtendable(MCII, MCI) ||
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HexagonMCInstrInfo::isExtended(MCII, MCI));
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MCOperand &exOp =
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MCI.getOperand(HexagonMCInstrInfo::getExtendableOp(MCII, MCI));
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// If the extended value is a constant, then use it for the extended and
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// for the extender instructions, masking off the lower 6 bits and
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// including the assumed bits.
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if (exOp.isImm()) {
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unsigned Shift = HexagonMCInstrInfo::getExtentAlignment(MCII, MCI);
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int64_t Bits = exOp.getImm();
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exOp.setImm((Bits & 0x3f) << Shift);
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}
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}
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MCInst *HexagonMCInstrInfo::deriveDuplex(MCContext &Context, unsigned iClass,
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MCInst const &inst0,
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MCInst const &inst1) {
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assert((iClass <= 0xf) && "iClass must have range of 0 to 0xf");
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MCInst *duplexInst = new (Context) MCInst;
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duplexInst->setOpcode(Hexagon::DuplexIClass0 + iClass);
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MCInst *SubInst0 = new (Context) MCInst(deriveSubInst(inst0));
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MCInst *SubInst1 = new (Context) MCInst(deriveSubInst(inst1));
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duplexInst->addOperand(MCOperand::createInst(SubInst0));
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duplexInst->addOperand(MCOperand::createInst(SubInst1));
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return duplexInst;
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}
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MCInst const *HexagonMCInstrInfo::extenderForIndex(MCInst const &MCB,
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size_t Index) {
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assert(Index <= bundleSize(MCB));
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if (Index == 0)
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return nullptr;
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MCInst const *Inst =
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MCB.getOperand(Index + bundleInstructionsOffset - 1).getInst();
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if (isImmext(*Inst))
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return Inst;
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return nullptr;
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}
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HexagonII::MemAccessSize
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HexagonMCInstrInfo::getAccessSize(MCInstrInfo const &MCII, MCInst const &MCI) {
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const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return (HexagonII::MemAccessSize((F >> HexagonII::MemAccessSizePos) &
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HexagonII::MemAccesSizeMask));
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}
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unsigned HexagonMCInstrInfo::getBitCount(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return ((F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask);
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}
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// Return constant extended operand number.
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unsigned short HexagonMCInstrInfo::getCExtOpNum(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return ((F >> HexagonII::ExtendableOpPos) & HexagonII::ExtendableOpMask);
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}
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MCInstrDesc const &HexagonMCInstrInfo::getDesc(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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return (MCII.get(MCI.getOpcode()));
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}
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unsigned short HexagonMCInstrInfo::getExtendableOp(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return ((F >> HexagonII::ExtendableOpPos) & HexagonII::ExtendableOpMask);
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}
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MCOperand const &
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HexagonMCInstrInfo::getExtendableOperand(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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unsigned O = HexagonMCInstrInfo::getExtendableOp(MCII, MCI);
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MCOperand const &MO = MCI.getOperand(O);
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assert((HexagonMCInstrInfo::isExtendable(MCII, MCI) ||
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HexagonMCInstrInfo::isExtended(MCII, MCI)) &&
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(MO.isImm() || MO.isExpr()));
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return (MO);
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}
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unsigned HexagonMCInstrInfo::getExtentAlignment(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return ((F >> HexagonII::ExtentAlignPos) & HexagonII::ExtentAlignMask);
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}
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unsigned HexagonMCInstrInfo::getExtentBits(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return ((F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask);
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}
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// Return the max value that a constant extendable operand can have
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// without being extended.
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int HexagonMCInstrInfo::getMaxValue(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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unsigned isSigned =
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(F >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask;
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unsigned bits = (F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask;
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if (isSigned) // if value is signed
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return ~(-1U << (bits - 1));
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else
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return ~(-1U << bits);
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}
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// Return the min value that a constant extendable operand can have
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// without being extended.
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int HexagonMCInstrInfo::getMinValue(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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unsigned isSigned =
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(F >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask;
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unsigned bits = (F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask;
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if (isSigned) // if value is signed
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return -1U << (bits - 1);
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else
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return 0;
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}
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char const *HexagonMCInstrInfo::getName(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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return MCII.getName(MCI.getOpcode());
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}
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unsigned short HexagonMCInstrInfo::getNewValueOp(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return ((F >> HexagonII::NewValueOpPos) & HexagonII::NewValueOpMask);
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}
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MCOperand const &HexagonMCInstrInfo::getNewValueOperand(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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unsigned const O =
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(F >> HexagonII::NewValueOpPos) & HexagonII::NewValueOpMask;
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MCOperand const &MCO = MCI.getOperand(O);
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assert((HexagonMCInstrInfo::isNewValue(MCII, MCI) ||
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HexagonMCInstrInfo::hasNewValue(MCII, MCI)) &&
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MCO.isReg());
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return (MCO);
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}
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int HexagonMCInstrInfo::getSubTarget(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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HexagonII::SubTarget Target = static_cast<HexagonII::SubTarget>(
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(F >> HexagonII::validSubTargetPos) & HexagonII::validSubTargetMask);
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switch (Target) {
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default:
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return Hexagon::ArchV4;
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case HexagonII::HasV5SubT:
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return Hexagon::ArchV5;
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}
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}
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// Return the Hexagon ISA class for the insn.
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unsigned HexagonMCInstrInfo::getType(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return ((F >> HexagonII::TypePos) & HexagonII::TypeMask);
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}
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unsigned HexagonMCInstrInfo::getUnits(MCInstrInfo const &MCII,
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MCSubtargetInfo const &STI,
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MCInst const &MCI) {
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const InstrItinerary *II = STI.getSchedModel().InstrItineraries;
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int SchedClass = HexagonMCInstrInfo::getDesc(MCII, MCI).getSchedClass();
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return ((II[SchedClass].FirstStage + HexagonStages)->getUnits());
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}
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bool HexagonMCInstrInfo::hasImmExt(MCInst const &MCI) {
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if (!HexagonMCInstrInfo::isBundle(MCI))
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return false;
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for (const auto &I : HexagonMCInstrInfo::bundleInstructions(MCI)) {
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auto MI = I.getInst();
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if (isImmext(*MI))
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return true;
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}
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return false;
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}
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bool HexagonMCInstrInfo::hasExtenderForIndex(MCInst const &MCB, size_t Index) {
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return extenderForIndex(MCB, Index) != nullptr;
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}
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// Return whether the instruction is a legal new-value producer.
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bool HexagonMCInstrInfo::hasNewValue(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return ((F >> HexagonII::hasNewValuePos) & HexagonII::hasNewValueMask);
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}
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MCInst const &HexagonMCInstrInfo::instruction(MCInst const &MCB, size_t Index) {
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assert(isBundle(MCB));
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assert(Index < HEXAGON_PACKET_SIZE);
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return *MCB.getOperand(bundleInstructionsOffset + Index).getInst();
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}
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bool HexagonMCInstrInfo::isBundle(MCInst const &MCI) {
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auto Result = Hexagon::BUNDLE == MCI.getOpcode();
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assert(!Result || (MCI.size() > 0 && MCI.getOperand(0).isImm()));
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return Result;
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}
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// Return whether the insn is an actual insn.
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bool HexagonMCInstrInfo::isCanon(MCInstrInfo const &MCII, MCInst const &MCI) {
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return (!HexagonMCInstrInfo::getDesc(MCII, MCI).isPseudo() &&
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!HexagonMCInstrInfo::isPrefix(MCII, MCI) &&
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HexagonMCInstrInfo::getType(MCII, MCI) != HexagonII::TypeENDLOOP);
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}
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bool HexagonMCInstrInfo::isDblRegForSubInst(unsigned Reg) {
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return ((Reg >= Hexagon::D0 && Reg <= Hexagon::D3) ||
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(Reg >= Hexagon::D8 && Reg <= Hexagon::D11));
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}
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bool HexagonMCInstrInfo::isDuplex(MCInstrInfo const &MCII, MCInst const &MCI) {
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return HexagonII::TypeDUPLEX == HexagonMCInstrInfo::getType(MCII, MCI);
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}
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// Return whether the instruction needs to be constant extended.
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// 1) Always return true if the instruction has 'isExtended' flag set.
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//
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// isExtendable:
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// 2) For immediate extended operands, return true only if the value is
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// out-of-range.
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// 3) For global address, always return true.
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bool HexagonMCInstrInfo::isConstExtended(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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if (HexagonMCInstrInfo::isExtended(MCII, MCI))
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return true;
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if (!HexagonMCInstrInfo::isExtendable(MCII, MCI))
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return false;
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short ExtOpNum = HexagonMCInstrInfo::getCExtOpNum(MCII, MCI);
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int MinValue = HexagonMCInstrInfo::getMinValue(MCII, MCI);
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int MaxValue = HexagonMCInstrInfo::getMaxValue(MCII, MCI);
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MCOperand const &MO = MCI.getOperand(ExtOpNum);
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// We could be using an instruction with an extendable immediate and shoehorn
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// a global address into it. If it is a global address it will be constant
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// extended. We do this for COMBINE.
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// We currently only handle isGlobal() because it is the only kind of
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// object we are going to end up with here for now.
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// In the future we probably should add isSymbol(), etc.
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if (MO.isExpr())
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return true;
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// If the extendable operand is not 'Immediate' type, the instruction should
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// have 'isExtended' flag set.
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assert(MO.isImm() && "Extendable operand must be Immediate type");
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int ImmValue = MO.getImm();
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return (ImmValue < MinValue || ImmValue > MaxValue);
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}
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bool HexagonMCInstrInfo::isExtendable(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return (F >> HexagonII::ExtendablePos) & HexagonII::ExtendableMask;
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}
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bool HexagonMCInstrInfo::isExtended(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return (F >> HexagonII::ExtendedPos) & HexagonII::ExtendedMask;
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}
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bool HexagonMCInstrInfo::isFloat(MCInstrInfo const &MCII, MCInst const &MCI) {
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const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return ((F >> HexagonII::FPPos) & HexagonII::FPMask);
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}
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bool HexagonMCInstrInfo::isImmext(MCInst const &MCI) {
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auto Op = MCI.getOpcode();
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return (Op == Hexagon::A4_ext_b || Op == Hexagon::A4_ext_c ||
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Op == Hexagon::A4_ext_g || Op == Hexagon::A4_ext);
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}
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bool HexagonMCInstrInfo::isInnerLoop(MCInst const &MCI) {
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assert(isBundle(MCI));
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int64_t Flags = MCI.getOperand(0).getImm();
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return (Flags & innerLoopMask) != 0;
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}
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bool HexagonMCInstrInfo::isIntReg(unsigned Reg) {
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return (Reg >= Hexagon::R0 && Reg <= Hexagon::R31);
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}
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bool HexagonMCInstrInfo::isIntRegForSubInst(unsigned Reg) {
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return ((Reg >= Hexagon::R0 && Reg <= Hexagon::R7) ||
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(Reg >= Hexagon::R16 && Reg <= Hexagon::R23));
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}
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// Return whether the insn is a new-value consumer.
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bool HexagonMCInstrInfo::isNewValue(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return ((F >> HexagonII::NewValuePos) & HexagonII::NewValueMask);
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}
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// Return whether the operand can be constant extended.
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bool HexagonMCInstrInfo::isOperandExtended(MCInstrInfo const &MCII,
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MCInst const &MCI,
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unsigned short OperandNum) {
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uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return ((F >> HexagonII::ExtendableOpPos) & HexagonII::ExtendableOpMask) ==
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OperandNum;
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}
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bool HexagonMCInstrInfo::isOuterLoop(MCInst const &MCI) {
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assert(isBundle(MCI));
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int64_t Flags = MCI.getOperand(0).getImm();
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return (Flags & outerLoopMask) != 0;
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}
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bool HexagonMCInstrInfo::isPredicated(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return ((F >> HexagonII::PredicatedPos) & HexagonII::PredicatedMask);
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}
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bool HexagonMCInstrInfo::isPredicatedTrue(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return (
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!((F >> HexagonII::PredicatedFalsePos) & HexagonII::PredicatedFalseMask));
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}
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bool HexagonMCInstrInfo::isPredReg(unsigned Reg) {
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return (Reg >= Hexagon::P0 && Reg <= Hexagon::P3_0);
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}
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bool HexagonMCInstrInfo::isPrefix(MCInstrInfo const &MCII, MCInst const &MCI) {
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return (HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypePREFIX);
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}
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bool HexagonMCInstrInfo::isSolo(MCInstrInfo const &MCII, MCInst const &MCI) {
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const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return ((F >> HexagonII::SoloPos) & HexagonII::SoloMask);
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}
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bool HexagonMCInstrInfo::isSoloAX(MCInstrInfo const &MCII, MCInst const &MCI) {
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const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return ((F >> HexagonII::SoloAXPos) & HexagonII::SoloAXMask);
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}
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bool HexagonMCInstrInfo::isSoloAin1(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
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return ((F >> HexagonII::SoloAin1Pos) & HexagonII::SoloAin1Mask);
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}
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void HexagonMCInstrInfo::padEndloop(MCInst &MCB) {
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MCInst Nop;
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Nop.setOpcode(Hexagon::A2_nop);
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assert(isBundle(MCB));
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while ((HexagonMCInstrInfo::isInnerLoop(MCB) &&
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(HexagonMCInstrInfo::bundleSize(MCB) < HEXAGON_PACKET_INNER_SIZE)) ||
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((HexagonMCInstrInfo::isOuterLoop(MCB) &&
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(HexagonMCInstrInfo::bundleSize(MCB) < HEXAGON_PACKET_OUTER_SIZE))))
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MCB.addOperand(MCOperand::createInst(new MCInst(Nop)));
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}
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bool HexagonMCInstrInfo::prefersSlot3(MCInstrInfo const &MCII,
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MCInst const &MCI) {
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if (HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypeCR)
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return false;
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unsigned SchedClass = HexagonMCInstrInfo::getDesc(MCII, MCI).getSchedClass();
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switch (SchedClass) {
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case Hexagon::Sched::ALU32_3op_tc_2_SLOT0123:
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case Hexagon::Sched::ALU64_tc_2_SLOT23:
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case Hexagon::Sched::ALU64_tc_3x_SLOT23:
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case Hexagon::Sched::M_tc_2_SLOT23:
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case Hexagon::Sched::M_tc_3x_SLOT23:
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case Hexagon::Sched::S_2op_tc_2_SLOT23:
|
|
case Hexagon::Sched::S_3op_tc_2_SLOT23:
|
|
case Hexagon::Sched::S_3op_tc_3x_SLOT23:
|
|
return true;
|
|
}
|
|
return false;
|
|
}
|
|
|
|
void HexagonMCInstrInfo::replaceDuplex(MCContext &Context, MCInst &MCB,
|
|
DuplexCandidate Candidate) {
|
|
assert(Candidate.packetIndexI < MCB.size());
|
|
assert(Candidate.packetIndexJ < MCB.size());
|
|
assert(isBundle(MCB));
|
|
MCInst *Duplex =
|
|
deriveDuplex(Context, Candidate.iClass,
|
|
*MCB.getOperand(Candidate.packetIndexJ).getInst(),
|
|
*MCB.getOperand(Candidate.packetIndexI).getInst());
|
|
assert(Duplex != nullptr);
|
|
MCB.getOperand(Candidate.packetIndexI).setInst(Duplex);
|
|
MCB.erase(MCB.begin() + Candidate.packetIndexJ);
|
|
}
|
|
|
|
void HexagonMCInstrInfo::setInnerLoop(MCInst &MCI) {
|
|
assert(isBundle(MCI));
|
|
MCOperand &Operand = MCI.getOperand(0);
|
|
Operand.setImm(Operand.getImm() | innerLoopMask);
|
|
}
|
|
|
|
void HexagonMCInstrInfo::setOuterLoop(MCInst &MCI) {
|
|
assert(isBundle(MCI));
|
|
MCOperand &Operand = MCI.getOperand(0);
|
|
Operand.setImm(Operand.getImm() | outerLoopMask);
|
|
}
|
|
}
|