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642eccbb21
All string occurences for "sparc", "Sparc" and "SPARC" were already replaced, with the exception of ELF constans in the object file descriptor as it will get removed later on (we won't be building ELF object files for the 6502).
102 lines
3.8 KiB
C++
102 lines
3.8 KiB
C++
//===-- Mos6502InstrInfo.h - Mos6502 Instruction Information --------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the Mos6502 implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_MOS6502_MOS6502INSTRINFO_H
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#define LLVM_LIB_TARGET_MOS6502_MOS6502INSTRINFO_H
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#include "Mos6502RegisterInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#define GET_INSTRINFO_HEADER
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#include "Mos6502GenInstrInfo.inc"
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namespace llvm {
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class Mos6502Subtarget;
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/// SPII - This namespace holds all of the target specific flags that
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/// instruction info tracks.
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///
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namespace SPII {
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enum {
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Pseudo = (1<<0),
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Load = (1<<1),
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Store = (1<<2),
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DelaySlot = (1<<3)
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};
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}
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class Mos6502InstrInfo : public Mos6502GenInstrInfo {
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const Mos6502RegisterInfo RI;
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const Mos6502Subtarget& Subtarget;
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virtual void anchor();
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public:
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explicit Mos6502InstrInfo(Mos6502Subtarget &ST);
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/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
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/// such, whenever a client has an instance of instruction info, it should
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/// always be able to get register info as well (through this method).
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///
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const Mos6502RegisterInfo &getRegisterInfo() const { return RI; }
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/// isLoadFromStackSlot - If the specified machine instruction is a direct
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/// load from a stack slot, return the virtual or physical register number of
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/// the destination along with the FrameIndex of the loaded stack slot. If
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/// not, return 0. This predicate must return 0 if the instruction has
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/// any side effects other than loading from the stack slot.
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unsigned isLoadFromStackSlot(const MachineInstr *MI,
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int &FrameIndex) const override;
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/// isStoreToStackSlot - If the specified machine instruction is a direct
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/// store to a stack slot, return the virtual or physical register number of
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/// the source reg along with the FrameIndex of the loaded stack slot. If
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/// not, return 0. This predicate must return 0 if the instruction has
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/// any side effects other than storing to the stack slot.
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unsigned isStoreToStackSlot(const MachineInstr *MI,
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int &FrameIndex) const override;
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bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
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MachineBasicBlock *&FBB,
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SmallVectorImpl<MachineOperand> &Cond,
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bool AllowModify = false) const override ;
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unsigned RemoveBranch(MachineBasicBlock &MBB) const override;
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unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
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MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
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DebugLoc DL) const override;
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void copyPhysReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I, DebugLoc DL,
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unsigned DestReg, unsigned SrcReg,
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bool KillSrc) const override;
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void storeRegToStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned SrcReg, bool isKill, int FrameIndex,
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const TargetRegisterClass *RC,
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const TargetRegisterInfo *TRI) const override;
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void loadRegFromStackSlot(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator MBBI,
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unsigned DestReg, int FrameIndex,
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const TargetRegisterClass *RC,
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const TargetRegisterInfo *TRI) const override;
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unsigned getGlobalBaseReg(MachineFunction *MF) const;
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};
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}
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#endif
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