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e6d6461067
When a new SM architecture is introduced, it is only supported by the current PTX version and later. Make sure we are using at least the minimum PTX version for the target architecture. This also removes support for PTX ISA < 3.2. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233583 91177308-0d34-0410-b5e6-96231b3b80d8
82 lines
3.1 KiB
TableGen
82 lines
3.1 KiB
TableGen
//===- NVPTX.td - Describe the NVPTX Target Machine -----------*- tblgen -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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// This is the top level entry point for the NVPTX target.
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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// Target-independent interfaces
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//===----------------------------------------------------------------------===//
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include "llvm/Target/Target.td"
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include "NVPTXRegisterInfo.td"
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include "NVPTXInstrInfo.td"
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//===----------------------------------------------------------------------===//
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// Subtarget Features.
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// - We use the SM version number instead of explicit feature table.
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// - Need at least one feature to avoid generating zero sized array by
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// TableGen in NVPTXGenSubtarget.inc.
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//===----------------------------------------------------------------------===//
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// SM Versions
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def SM20 : SubtargetFeature<"sm_20", "SmVersion", "20",
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"Target SM 2.0">;
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def SM21 : SubtargetFeature<"sm_21", "SmVersion", "21",
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"Target SM 2.1">;
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def SM30 : SubtargetFeature<"sm_30", "SmVersion", "30",
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"Target SM 3.0">;
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def SM32 : SubtargetFeature<"sm_32", "SmVersion", "32",
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"Target SM 3.2">;
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def SM35 : SubtargetFeature<"sm_35", "SmVersion", "35",
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"Target SM 3.5">;
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def SM37 : SubtargetFeature<"sm_37", "SmVersion", "37",
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"Target SM 3.7">;
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def SM50 : SubtargetFeature<"sm_50", "SmVersion", "50",
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"Target SM 5.0">;
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def SM52 : SubtargetFeature<"sm_52", "SmVersion", "52",
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"Target SM 5.2">;
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def SM53 : SubtargetFeature<"sm_53", "SmVersion", "53",
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"Target SM 5.3">;
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// PTX Versions
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def PTX32 : SubtargetFeature<"ptx32", "PTXVersion", "32",
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"Use PTX version 3.2">;
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def PTX40 : SubtargetFeature<"ptx40", "PTXVersion", "40",
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"Use PTX version 4.0">;
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def PTX41 : SubtargetFeature<"ptx41", "PTXVersion", "41",
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"Use PTX version 4.1">;
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def PTX42 : SubtargetFeature<"ptx42", "PTXVersion", "42",
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"Use PTX version 4.2">;
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//===----------------------------------------------------------------------===//
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// NVPTX supported processors.
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//===----------------------------------------------------------------------===//
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class Proc<string Name, list<SubtargetFeature> Features>
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: Processor<Name, NoItineraries, Features>;
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def : Proc<"sm_20", [SM20]>;
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def : Proc<"sm_21", [SM21]>;
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def : Proc<"sm_30", [SM30]>;
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def : Proc<"sm_32", [SM32, PTX40]>;
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def : Proc<"sm_35", [SM35]>;
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def : Proc<"sm_37", [SM37, PTX41]>;
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def : Proc<"sm_50", [SM50, PTX40]>;
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def : Proc<"sm_52", [SM52, PTX41]>;
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def : Proc<"sm_53", [SM53, PTX42]>;
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def NVPTXInstrInfo : InstrInfo {
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}
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def NVPTX : Target {
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let InstructionSet = NVPTXInstrInfo;
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}
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