llvm-6502/test/Assembler/numbered-values.ll
David Blaikie 7c9c6ed761 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-27 21:17:42 +00:00

18 lines
529 B
LLVM

; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis
; RUN: verify-uselistorder %s
; PR2480
define i32 @test(i32 %X) nounwind {
entry:
%X_addr = alloca i32 ; <i32*> [#uses=2]
%retval = alloca i32 ; <i32*> [#uses=2]
%0 = alloca i32 ; <i32*>:0 [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
store i32 %X, i32* %X_addr
%1 = load i32, i32* %X_addr, align 4 ; <i32>:1 [#uses=1]
mul i32 %1, 4 ; <i32>:2 [#uses=1]
%3 = add i32 %2, 123 ; <i32>:3 [#uses=1]
store i32 %3, i32* %0, align 4
ret i32 %3
}