mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-06-17 03:29:52 +00:00
5f843038fb
This includes constants, attributes, and some additional instructions not covered by previous tests. Work was done by lama.saba@intel.com. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218297 91177308-0d34-0410-b5e6-96231b3b80d8
77 lines
1.2 KiB
LLVM
77 lines
1.2 KiB
LLVM
; RUN: llvm-dis < %s.bc| FileCheck %s
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; TerminatorOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
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; The test checks that LLVM does not misread terminator instructions from
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; older bitcode files.
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define i32 @condbr(i1 %cond){
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entry:
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; CHECK: br i1 %cond, label %TrueLabel, label %FalseLabel
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br i1 %cond, label %TrueLabel, label %FalseLabel
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TrueLabel:
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ret i32 1
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FalseLabel:
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ret i32 0
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}
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define i32 @uncondbr(){
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entry:
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; CHECK: br label %uncondLabel
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br label %uncondLabel
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uncondLabel:
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ret i32 1
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}
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define i32 @indirectbr(i8* %Addr){
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entry:
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; CHECK: indirectbr i8* %Addr, [label %bb1, label %bb2]
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indirectbr i8* %Addr, [ label %bb1, label %bb2 ]
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bb1:
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ret i32 1
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bb2:
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ret i32 0
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}
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define void @unreachable(){
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entry:
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; CHECK: unreachable
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unreachable
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ret void
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}
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define i32 @retInstr(){
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entry:
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; CHECK: ret i32 1
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ret i32 1
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}
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define void @retInstr2(){
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entry:
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; CHECK: ret void
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ret void
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}
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define i32 @switchInstr(i32 %x){
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entry:
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; CHECK: switch i32 %x, label %label3 [
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switch i32 %x, label %label3 [
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; CHECK-NEXT: i32 1, label %label1
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i32 1, label %label1
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; CHECK-NEXT: i32 2, label %label2
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i32 2, label %label2
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]
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label1:
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ret i32 1
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label2:
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ret i32 2
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label3:
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ret i32 0
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}
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