mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-06-26 10:29:57 +00:00
27b1252c13
This changes the tests that were targeting ARM EABI to explicitly specify the environment rather than relying on the default. This breaks with the new Windows on ARM support when running the tests on Windows where the default environment is no longer EABI. Take the opportunity to avoid a pointless redirect (helps when trying to debug with providing a command line invocation which can be copy and pasted) and removing a few greps in favour of FileCheck. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205541 91177308-0d34-0410-b5e6-96231b3b80d8
58 lines
1.9 KiB
ArmAsm
58 lines
1.9 KiB
ArmAsm
// RUN: not llvm-mc -triple arm-eabi -mattr=+v5te %s -o /dev/null 2>&1 | FileCheck %s
|
|
//
|
|
// rdar://14479793
|
|
|
|
ldrd r1, r2, [pc, #0]
|
|
ldrd r1, r2, [r3, #4]
|
|
ldrd r1, r2, [r3], #4
|
|
ldrd r1, r2, [r3, #4]!
|
|
ldrd r1, r2, [r3, -r4]!
|
|
ldrd r1, r2, [r3, r4]
|
|
ldrd r1, r2, [r3], r4
|
|
// CHECK: error: Rt must be even-numbered
|
|
// CHECK: error: Rt must be even-numbered
|
|
// CHECK: error: Rt must be even-numbered
|
|
// CHECK: error: Rt must be even-numbered
|
|
// CHECK: error: Rt must be even-numbered
|
|
// CHECK: error: Rt must be even-numbered
|
|
// CHECK: error: Rt must be even-numbered
|
|
|
|
ldrd r0, r3, [pc, #0]
|
|
ldrd r0, r3, [r4, #4]
|
|
ldrd r0, r3, [r4], #4
|
|
ldrd r0, r3, [r4, #4]!
|
|
ldrd r0, r3, [r4, -r5]!
|
|
ldrd r0, r3, [r4, r5]
|
|
ldrd r0, r3, [r4], r5
|
|
// CHECK: error: destination operands must be sequential
|
|
// CHECK: error: destination operands must be sequential
|
|
// CHECK: error: destination operands must be sequential
|
|
// CHECK: error: destination operands must be sequential
|
|
// CHECK: error: destination operands must be sequential
|
|
// CHECK: error: destination operands must be sequential
|
|
// CHECK: error: destination operands must be sequential
|
|
|
|
ldrd lr, pc, [pc, #0]
|
|
ldrd lr, pc, [r3, #4]
|
|
ldrd lr, pc, [r3], #4
|
|
ldrd lr, pc, [r3, #4]!
|
|
ldrd lr, pc, [r3, -r4]!
|
|
ldrd lr, pc, [r3, r4]
|
|
ldrd lr, pc, [r3], r4
|
|
// CHECK: error: Rt can't be R14
|
|
// CHECK: error: Rt can't be R14
|
|
// CHECK: error: Rt can't be R14
|
|
// CHECK: error: Rt can't be R14
|
|
// CHECK: error: Rt can't be R14
|
|
// CHECK: error: Rt can't be R14
|
|
// CHECK: error: Rt can't be R14
|
|
|
|
ldrd r0, r1, [r0], #4
|
|
ldrd r0, r1, [r1], #4
|
|
ldrd r0, r1, [r0, #4]!
|
|
ldrd r0, r1, [r1, #4]!
|
|
// CHECK: error: base register needs to be different from destination registers
|
|
// CHECK: error: base register needs to be different from destination registers
|
|
// CHECK: error: base register needs to be different from destination registers
|
|
// CHECK: error: base register needs to be different from destination registers
|