llvm-6502/test/MC/Mips/mips64r2
Daniel Sanders 817cbdeae6 [mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0.
Summary:
Previously it (incorrectly) used GPR's.

Patch by Simon Dardis. A couple small corrections by myself.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10567


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240883 91177308-0d34-0410-b5e6-96231b3b80d8
2015-06-27 15:39:19 +00:00
..
abi-bad.s [mips] Fix FileCheck prefixes with whitespace between 'CHECK' and ':' 2015-02-06 16:37:30 +00:00
abiflags.s [mips] Add MipsOptionRecord abstraction and use it to implement .reginfo/.MIPS.options 2014-07-21 13:30:55 +00:00
invalid.s [mips] Move CHECK lines to the same line as the instruction it's testing 2014-06-12 09:50:17 +00:00
valid-xfail.s [MIPS]Multiple and add instructions for Mips are currently available in mips32r2/mips64r2 and later but should also be available in mips4, mips5, and mips64. This patch fixes the requested features and updates the corresponding test files. 2015-02-25 15:24:37 +00:00
valid.s [mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0. 2015-06-27 15:39:19 +00:00