llvm-6502/test/CodeGen/X86/avoid-lea-scale2.ll
Bill Wendling 3844109d1e --- Merging r127731 into '.':
U    test/CodeGen/X86/byval2.ll
U    test/CodeGen/X86/byval4.ll
U    test/CodeGen/X86/byval.ll
U    test/CodeGen/X86/byval3.ll
U    test/CodeGen/X86/byval5.ll
--- Merging r127732 into '.':
U    test/CodeGen/X86/stdarg.ll
U    test/CodeGen/X86/fold-mul-lohi.ll
U    test/CodeGen/X86/scalar-min-max-fill-operand.ll
U    test/CodeGen/X86/tailcallbyval64.ll
U    test/CodeGen/X86/stride-reuse.ll
U    test/CodeGen/X86/sse-align-3.ll
U    test/CodeGen/X86/sse-commute.ll
U    test/CodeGen/X86/stride-nine-with-base-reg.ll
U    test/CodeGen/X86/coalescer-commute2.ll
U    test/CodeGen/X86/sse-align-7.ll
U    test/CodeGen/X86/sse_reload_fold.ll
U    test/CodeGen/X86/sse-align-0.ll
--- Merging r127733 into '.':
U    test/CodeGen/X86/peep-vector-extract-concat.ll
U    test/CodeGen/X86/pmulld.ll
U    test/CodeGen/X86/widen_load-0.ll
U    test/CodeGen/X86/v2f32.ll
U    test/CodeGen/X86/apm.ll
U    test/CodeGen/X86/h-register-store.ll
U    test/CodeGen/X86/h-registers-0.ll
--- Merging r127734 into '.':
U    test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll
U    test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll
U    test/CodeGen/X86/avoid-lea-scale2.ll
U    test/CodeGen/X86/lea-3.ll
U    test/CodeGen/X86/vec_set-8.ll
U    test/CodeGen/X86/i64-mem-copy.ll
U    test/CodeGen/X86/x86-64-malloc.ll
U    test/CodeGen/X86/mmx-copy-gprs.ll
U    test/CodeGen/X86/vec_shuffle-17.ll
U    test/CodeGen/X86/2007-07-18-Vector-Extract.ll
--- Merging r127775 into '.':
U    test/CodeGen/X86/constant-pool-remat-0.ll
--- Merging r127872 into '.':
U    utils/lit/lit/TestingConfig.py
U    lib/Support/raw_ostream.cpp



git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_29@128258 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-25 06:22:54 +00:00

11 lines
256 B
LLVM

; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
; CHECK: leal -2({{%rdi,%rdi|%rcx,%rcx}})
define i32 @foo(i32 %x) nounwind readnone {
%t0 = shl i32 %x, 1
%t1 = add i32 %t0, -2
ret i32 %t1
}