mirror of
https://github.com/c64scene-ar/llvm-6502.git
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3844109d1e
U test/CodeGen/X86/byval2.ll U test/CodeGen/X86/byval4.ll U test/CodeGen/X86/byval.ll U test/CodeGen/X86/byval3.ll U test/CodeGen/X86/byval5.ll --- Merging r127732 into '.': U test/CodeGen/X86/stdarg.ll U test/CodeGen/X86/fold-mul-lohi.ll U test/CodeGen/X86/scalar-min-max-fill-operand.ll U test/CodeGen/X86/tailcallbyval64.ll U test/CodeGen/X86/stride-reuse.ll U test/CodeGen/X86/sse-align-3.ll U test/CodeGen/X86/sse-commute.ll U test/CodeGen/X86/stride-nine-with-base-reg.ll U test/CodeGen/X86/coalescer-commute2.ll U test/CodeGen/X86/sse-align-7.ll U test/CodeGen/X86/sse_reload_fold.ll U test/CodeGen/X86/sse-align-0.ll --- Merging r127733 into '.': U test/CodeGen/X86/peep-vector-extract-concat.ll U test/CodeGen/X86/pmulld.ll U test/CodeGen/X86/widen_load-0.ll U test/CodeGen/X86/v2f32.ll U test/CodeGen/X86/apm.ll U test/CodeGen/X86/h-register-store.ll U test/CodeGen/X86/h-registers-0.ll --- Merging r127734 into '.': U test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll U test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll U test/CodeGen/X86/avoid-lea-scale2.ll U test/CodeGen/X86/lea-3.ll U test/CodeGen/X86/vec_set-8.ll U test/CodeGen/X86/i64-mem-copy.ll U test/CodeGen/X86/x86-64-malloc.ll U test/CodeGen/X86/mmx-copy-gprs.ll U test/CodeGen/X86/vec_shuffle-17.ll U test/CodeGen/X86/2007-07-18-Vector-Extract.ll --- Merging r127775 into '.': U test/CodeGen/X86/constant-pool-remat-0.ll --- Merging r127872 into '.': U utils/lit/lit/TestingConfig.py U lib/Support/raw_ostream.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_29@128258 91177308-0d34-0410-b5e6-96231b3b80d8
60 lines
1.9 KiB
LLVM
60 lines
1.9 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
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; X64-NOT: movsq
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; X64: rep
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; X64-NOT: rep
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; X64: movsq
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; X64-NOT: movsq
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; X64: rep
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; X64-NOT: rep
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; X64: movsq
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; X64-NOT: rep
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; X64-NOT: movsq
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; Win64 has not supported byval yet.
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; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X32
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; X32-NOT: movsl
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; X32: rep
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; X32-NOT: rep
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; X32: movsl
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; X32-NOT: movsl
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; X32: rep
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; X32-NOT: rep
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; X32: movsl
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; X32-NOT: rep
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; X32-NOT: movsl
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%struct.s = type { i16, i16, i16, i16, i16, i16, i16, i16,
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i16, i16, i16, i16, i16, i16, i16, i16,
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i16, i16, i16, i16, i16, i16, i16, i16,
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i16, i16, i16, i16, i16, i16, i16, i16,
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i16, i16, i16, i16, i16, i16, i16, i16,
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i16, i16, i16, i16, i16, i16, i16, i16,
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i16, i16, i16, i16, i16, i16, i16, i16,
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i16, i16, i16, i16, i16, i16, i16, i16,
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i16 }
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define void @g(i16 signext %a1, i16 signext %a2, i16 signext %a3,
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i16 signext %a4, i16 signext %a5, i16 signext %a6) nounwind {
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entry:
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%a = alloca %struct.s, align 16
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%tmp = getelementptr %struct.s* %a, i32 0, i32 0
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store i16 %a1, i16* %tmp, align 16
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%tmp2 = getelementptr %struct.s* %a, i32 0, i32 1
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store i16 %a2, i16* %tmp2, align 16
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%tmp4 = getelementptr %struct.s* %a, i32 0, i32 2
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store i16 %a3, i16* %tmp4, align 16
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%tmp6 = getelementptr %struct.s* %a, i32 0, i32 3
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store i16 %a4, i16* %tmp6, align 16
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%tmp8 = getelementptr %struct.s* %a, i32 0, i32 4
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store i16 %a5, i16* %tmp8, align 16
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%tmp10 = getelementptr %struct.s* %a, i32 0, i32 5
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store i16 %a6, i16* %tmp10, align 16
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call void @f( %struct.s* %a byval )
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call void @f( %struct.s* %a byval )
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ret void
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}
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declare void @f(%struct.s* byval)
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