mirror of
https://github.com/c64scene-ar/llvm-6502.git
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3844109d1e
U test/CodeGen/X86/byval2.ll U test/CodeGen/X86/byval4.ll U test/CodeGen/X86/byval.ll U test/CodeGen/X86/byval3.ll U test/CodeGen/X86/byval5.ll --- Merging r127732 into '.': U test/CodeGen/X86/stdarg.ll U test/CodeGen/X86/fold-mul-lohi.ll U test/CodeGen/X86/scalar-min-max-fill-operand.ll U test/CodeGen/X86/tailcallbyval64.ll U test/CodeGen/X86/stride-reuse.ll U test/CodeGen/X86/sse-align-3.ll U test/CodeGen/X86/sse-commute.ll U test/CodeGen/X86/stride-nine-with-base-reg.ll U test/CodeGen/X86/coalescer-commute2.ll U test/CodeGen/X86/sse-align-7.ll U test/CodeGen/X86/sse_reload_fold.ll U test/CodeGen/X86/sse-align-0.ll --- Merging r127733 into '.': U test/CodeGen/X86/peep-vector-extract-concat.ll U test/CodeGen/X86/pmulld.ll U test/CodeGen/X86/widen_load-0.ll U test/CodeGen/X86/v2f32.ll U test/CodeGen/X86/apm.ll U test/CodeGen/X86/h-register-store.ll U test/CodeGen/X86/h-registers-0.ll --- Merging r127734 into '.': U test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll U test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll U test/CodeGen/X86/avoid-lea-scale2.ll U test/CodeGen/X86/lea-3.ll U test/CodeGen/X86/vec_set-8.ll U test/CodeGen/X86/i64-mem-copy.ll U test/CodeGen/X86/x86-64-malloc.ll U test/CodeGen/X86/mmx-copy-gprs.ll U test/CodeGen/X86/vec_shuffle-17.ll U test/CodeGen/X86/2007-07-18-Vector-Extract.ll --- Merging r127775 into '.': U test/CodeGen/X86/constant-pool-remat-0.ll --- Merging r127872 into '.': U utils/lit/lit/TestingConfig.py U lib/Support/raw_ostream.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_29@128258 91177308-0d34-0410-b5e6-96231b3b80d8
116 lines
2.7 KiB
LLVM
116 lines
2.7 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn -asm-verbose=0 -o - | FileCheck %s -check-prefix=X64
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; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=penryn -asm-verbose=0 -o - | FileCheck %s -check-prefix=W64
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; RUN: llc < %s -mcpu=yonah -march=x86 -asm-verbose=0 -o - | FileCheck %s -check-prefix=X32
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; PR7518
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define void @test1(<2 x float> %Q, float *%P2) nounwind {
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%a = extractelement <2 x float> %Q, i32 0
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%b = extractelement <2 x float> %Q, i32 1
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%c = fadd float %a, %b
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store float %c, float* %P2
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ret void
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; X64: test1:
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; X64-NEXT: pshufd $1, %xmm0, %xmm1
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; X64-NEXT: addss %xmm0, %xmm1
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; X64-NEXT: movss %xmm1, (%rdi)
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; X64-NEXT: ret
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; W64: test1:
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; W64-NEXT: movdqa (%rcx), %xmm0
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; W64-NEXT: pshufd $1, %xmm0, %xmm1
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; W64-NEXT: addss %xmm0, %xmm1
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; W64-NEXT: movss %xmm1, (%rdx)
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; W64-NEXT: ret
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; X32: test1:
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; X32-NEXT: pshufd $1, %xmm0, %xmm1
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; X32-NEXT: addss %xmm0, %xmm1
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; X32-NEXT: movl 4(%esp), %eax
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; X32-NEXT: movss %xmm1, (%eax)
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; X32-NEXT: ret
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}
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define <2 x float> @test2(<2 x float> %Q, <2 x float> %R, <2 x float> *%P) nounwind {
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%Z = fadd <2 x float> %Q, %R
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ret <2 x float> %Z
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; X64: test2:
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; X64-NEXT: addps %xmm1, %xmm0
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; X64-NEXT: ret
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; W64: test2:
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; W64-NEXT: movaps (%rcx), %xmm0
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; W64-NEXT: addps (%rdx), %xmm0
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; W64-NEXT: ret
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; X32: test2:
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; X32: addps %xmm1, %xmm0
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}
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define <2 x float> @test3(<4 x float> %A) nounwind {
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%B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1>
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%C = fadd <2 x float> %B, %B
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ret <2 x float> %C
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; X64: test3:
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; X64-NEXT: addps %xmm0, %xmm0
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; X64-NEXT: ret
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; W64: test3:
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; W64-NEXT: movaps (%rcx), %xmm0
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; W64-NEXT: addps %xmm0, %xmm0
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; W64-NEXT: ret
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; X32: test3:
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; X32-NEXT: addps %xmm0, %xmm0
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; X32-NEXT: ret
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}
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define <2 x float> @test4(<2 x float> %A) nounwind {
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%C = fadd <2 x float> %A, %A
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ret <2 x float> %C
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; X64: test4:
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; X64-NEXT: addps %xmm0, %xmm0
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; X64-NEXT: ret
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; W64: test4:
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; W64-NEXT: movaps (%rcx), %xmm0
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; W64-NEXT: addps %xmm0, %xmm0
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; W64-NEXT: ret
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; X32: test4:
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; X32-NEXT: addps %xmm0, %xmm0
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; X32-NEXT: ret
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}
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define <4 x float> @test5(<4 x float> %A) nounwind {
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%B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1>
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%C = fadd <2 x float> %B, %B
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br label %BB
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BB:
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%D = fadd <2 x float> %C, %C
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%E = shufflevector <2 x float> %D, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
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ret <4 x float> %E
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; X64: test5:
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; X64-NEXT: addps %xmm0, %xmm0
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; X64-NEXT: addps %xmm0, %xmm0
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; X64-NEXT: ret
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; W64: test5:
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; W64-NEXT: movaps (%rcx), %xmm0
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; W64-NEXT: addps %xmm0, %xmm0
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; W64-NEXT: addps %xmm0, %xmm0
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; W64-NEXT: ret
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; X32: test5:
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; X32-NEXT: addps %xmm0, %xmm0
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; X32-NEXT: addps %xmm0, %xmm0
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; X32-NEXT: ret
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}
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