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https://github.com/c64scene-ar/llvm-6502.git
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3844109d1e
U test/CodeGen/X86/byval2.ll U test/CodeGen/X86/byval4.ll U test/CodeGen/X86/byval.ll U test/CodeGen/X86/byval3.ll U test/CodeGen/X86/byval5.ll --- Merging r127732 into '.': U test/CodeGen/X86/stdarg.ll U test/CodeGen/X86/fold-mul-lohi.ll U test/CodeGen/X86/scalar-min-max-fill-operand.ll U test/CodeGen/X86/tailcallbyval64.ll U test/CodeGen/X86/stride-reuse.ll U test/CodeGen/X86/sse-align-3.ll U test/CodeGen/X86/sse-commute.ll U test/CodeGen/X86/stride-nine-with-base-reg.ll U test/CodeGen/X86/coalescer-commute2.ll U test/CodeGen/X86/sse-align-7.ll U test/CodeGen/X86/sse_reload_fold.ll U test/CodeGen/X86/sse-align-0.ll --- Merging r127733 into '.': U test/CodeGen/X86/peep-vector-extract-concat.ll U test/CodeGen/X86/pmulld.ll U test/CodeGen/X86/widen_load-0.ll U test/CodeGen/X86/v2f32.ll U test/CodeGen/X86/apm.ll U test/CodeGen/X86/h-register-store.ll U test/CodeGen/X86/h-registers-0.ll --- Merging r127734 into '.': U test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll U test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll U test/CodeGen/X86/avoid-lea-scale2.ll U test/CodeGen/X86/lea-3.ll U test/CodeGen/X86/vec_set-8.ll U test/CodeGen/X86/i64-mem-copy.ll U test/CodeGen/X86/x86-64-malloc.ll U test/CodeGen/X86/mmx-copy-gprs.ll U test/CodeGen/X86/vec_shuffle-17.ll U test/CodeGen/X86/2007-07-18-Vector-Extract.ll --- Merging r127775 into '.': U test/CodeGen/X86/constant-pool-remat-0.ll --- Merging r127872 into '.': U utils/lit/lit/TestingConfig.py U lib/Support/raw_ostream.cpp git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_29@128258 91177308-0d34-0410-b5e6-96231b3b80d8
28 lines
967 B
LLVM
28 lines
967 B
LLVM
; RUN: llc < %s -o - -mtriple=x86_64-linux | FileCheck %s
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; RUN: llc < %s -o - -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
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; PR4891
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; Both loads should happen before either store.
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; CHECK: movl (%rdi), %eax
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; CHECK: movl (%rsi), %ecx
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; CHECK: movl %ecx, (%rdi)
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; CHECK: movl %eax, (%rsi)
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; WIN64: movl (%rcx), %eax
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; WIN64: movl (%rdx), %esi
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; WIN64: movl %esi, (%rcx)
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; WIN64: movl %eax, (%rdx)
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define void @short2_int_swap(<2 x i16>* nocapture %b, i32* nocapture %c) nounwind {
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entry:
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%0 = load <2 x i16>* %b, align 2 ; <<2 x i16>> [#uses=1]
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%1 = load i32* %c, align 4 ; <i32> [#uses=1]
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%tmp1 = bitcast i32 %1 to <2 x i16> ; <<2 x i16>> [#uses=1]
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store <2 x i16> %tmp1, <2 x i16>* %b, align 2
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%tmp5 = bitcast <2 x i16> %0 to <1 x i32> ; <<1 x i32>> [#uses=1]
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%tmp3 = extractelement <1 x i32> %tmp5, i32 0 ; <i32> [#uses=1]
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store i32 %tmp3, i32* %c, align 4
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ret void
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}
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