llvm-6502/test/CodeGen/AArch64/atomic-ops.ll at release_34

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Tom Stellard 79944ce3da Merging r201841:

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r201841 | Kevin.Qin | 2014-02-21 02:45:48 -0500 (Fri, 21 Feb 2014) | 2 lines

[AArch64] Add register constraints to avoid generating STLXR and STXR with unpredictable behavior.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_34@205903 91177308-0d34-0410-b5e6-96231b3b80d8

2014-04-09 15:24:19 +00:00

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