llvm-6502/test/Bitcode/aggregateInstructions.3.2.ll
Michael Kuperstein 2d0eef4c7d Ensure bitcode encoding of instructions and their operands stays stable.
This includes instructions with aggregate operands (insert/extract), instructions with vector operands (insert/extract/shuffle), binary arithmetic and bitwise instructions, conversion instructions and terminators.

Work was done by lama.saba@intel.com.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202262 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-26 12:06:36 +00:00

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1.1 KiB
LLVM

; RUN: llvm-dis < %s.bc| FileCheck %s
; aggregateOperations.3.2.ll.bc was generated by passing this file to llvm-as-3.2.
; The test checks that LLVM does not misread instructions with aggregate operands
; in older bitcode files.
define void @extractvalue([4 x i8] %x1, [4 x [4 x i8]] %x2, {{i32, float}} %x3){
entry:
; CHECK: %res1 = extractvalue [4 x i8] %x1, 0
%res1 = extractvalue [4 x i8] %x1, 0
; CHECK-NEXT: %res2 = extractvalue [4 x [4 x i8]] %x2, 1
%res2 = extractvalue [4 x [4 x i8 ]] %x2, 1
; CHECK-NEXT: %res3 = extractvalue [4 x [4 x i8]] %x2, 0, 1
%res3 = extractvalue [4 x [4 x i8 ]] %x2, 0, 1
; CHECK-NEXT: %res4 = extractvalue { { i32, float } } %x3, 0, 1
%res4 = extractvalue {{i32, float}} %x3, 0, 1
ret void
}
define void @insertvalue([4 x [4 x i8 ]] %x1){
entry:
; CHECK: %res1 = insertvalue [4 x [4 x i8]] %x1, i8 0, 0, 0
%res1 = insertvalue [4 x [4 x i8 ]] %x1, i8 0, 0, 0
; CHECK-NEXT: %res2 = insertvalue [4 x [4 x i8]] undef, i8 0, 0, 0
%res2 = insertvalue [4 x [4 x i8 ]] undef, i8 0, 0, 0
ret void
}