mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-13 04:30:23 +00:00
29f94c7201
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209577 91177308-0d34-0410-b5e6-96231b3b80d8
64 lines
2.5 KiB
ArmAsm
64 lines
2.5 KiB
ArmAsm
// RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+neon -show-encoding < %s | FileCheck %s
|
|
|
|
// Check that the assembler can handle the documented syntax for AArch64
|
|
|
|
//----------------------------------------------------------------------
|
|
// Scalar Integer Saturating Doubling Multiply Half High
|
|
//----------------------------------------------------------------------
|
|
|
|
sqdmulh h10, h11, h12
|
|
sqdmulh s20, s21, s2
|
|
|
|
// CHECK: sqdmulh h10, h11, h12 // encoding: [0x6a,0xb5,0x6c,0x5e]
|
|
// CHECK: sqdmulh s20, s21, s2 // encoding: [0xb4,0xb6,0xa2,0x5e]
|
|
|
|
//----------------------------------------------------------------------
|
|
// Scalar Integer Saturating Rounding Doubling Multiply Half High
|
|
//----------------------------------------------------------------------
|
|
|
|
sqrdmulh h10, h11, h12
|
|
sqrdmulh s20, s21, s2
|
|
|
|
// CHECK: sqrdmulh h10, h11, h12 // encoding: [0x6a,0xb5,0x6c,0x7e]
|
|
// CHECK: sqrdmulh s20, s21, s2 // encoding: [0xb4,0xb6,0xa2,0x7e]
|
|
|
|
//----------------------------------------------------------------------
|
|
// Floating-point Multiply Extended
|
|
//----------------------------------------------------------------------
|
|
|
|
fmulx s20, s22, s15
|
|
fmulx d23, d11, d1
|
|
|
|
// CHECK: fmulx s20, s22, s15 // encoding: [0xd4,0xde,0x2f,0x5e]
|
|
// CHECK: fmulx d23, d11, d1 // encoding: [0x77,0xdd,0x61,0x5e]
|
|
|
|
//----------------------------------------------------------------------
|
|
// Signed Saturating Doubling Multiply-Add Long
|
|
//----------------------------------------------------------------------
|
|
|
|
sqdmlal s17, h27, h12
|
|
sqdmlal d19, s24, s12
|
|
|
|
// CHECK: sqdmlal s17, h27, h12 // encoding: [0x71,0x93,0x6c,0x5e]
|
|
// CHECK: sqdmlal d19, s24, s12 // encoding: [0x13,0x93,0xac,0x5e]
|
|
|
|
//----------------------------------------------------------------------
|
|
// Signed Saturating Doubling Multiply-Subtract Long
|
|
//----------------------------------------------------------------------
|
|
|
|
sqdmlsl s14, h12, h25
|
|
sqdmlsl d12, s23, s13
|
|
|
|
// CHECK: sqdmlsl s14, h12, h25 // encoding: [0x8e,0xb1,0x79,0x5e]
|
|
// CHECK: sqdmlsl d12, s23, s13 // encoding: [0xec,0xb2,0xad,0x5e]
|
|
|
|
//----------------------------------------------------------------------
|
|
// Signed Saturating Doubling Multiply Long
|
|
//----------------------------------------------------------------------
|
|
|
|
sqdmull s12, h22, h12
|
|
sqdmull d15, s22, s12
|
|
|
|
// CHECK: sqdmull s12, h22, h12 // encoding: [0xcc,0xd2,0x6c,0x5e]
|
|
// CHECK: sqdmull d15, s22, s12 // encoding: [0xcf,0xd2,0xac,0x5e]
|