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Currently, the ARM disassembler will disassemble the Thumb2 memory hint instructions (PLD, PLDW and PLI), even for targets which do not have these instructions. This patch adds the required checks to the disassmebler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220472 91177308-0d34-0410-b5e6-96231b3b80d8
70 lines
2.3 KiB
Plaintext
70 lines
2.3 KiB
Plaintext
# RUN: not llvm-mc -triple=thumbv6t2-none-eabi -disassemble < %s 2>/dev/null | FileCheck %s --check-prefix=V6T2
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# RUN: not llvm-mc -triple=thumbv7a-none-eabi -disassemble -mattr=-mp < %s 2>/dev/null | FileCheck %s --check-prefix=V6T2 --check-prefix=V7
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# RUN: llvm-mc -triple=thumbv7a-none-eabi -disassemble -mattr=+mp < %s 2>/dev/null | FileCheck %s --check-prefix=V6T2 --check-prefix=V7 --check-prefix=MP
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# RUN: not llvm-mc -triple=thumbv7m-none-eabi -disassemble < %s 2>/dev/null | FileCheck %s --check-prefix=V6T2 --check-prefix=V7
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# RUN: not llvm-mc -triple=thumbv6t2-none-eabi -disassemble < %s 2>&1 >/dev/null | FileCheck %s --check-prefix=MP-ERR --check-prefix=V7-ERR
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# RUN: not llvm-mc -triple=thumbv7a-none-eabi -disassemble -mattr=-mp < %s 2>&1 >/dev/null | FileCheck %s --check-prefix=MP-ERR
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# RUN: llvm-mc -triple=thumbv7a-none-eabi -disassemble -mattr=+mp < %s 2>&1 >/dev/null
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# RUN: not llvm-mc -triple=thumbv7m-none-eabi -disassemble < %s 2>&1 >/dev/null | FileCheck %s --check-prefix=MP-ERR
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# V6T2: pld [r1, #3]
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[0x91,0xf8,0x03,0xf0]
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# V6T2: pld [r2, #-5]
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[0x12,0xf8,0x05,0xfc]
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# MP: pldw [r3, #4]
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# MP-ERR: invalid instruction encoding
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# MP-ERR-NEXT: [0xb3,0xf8,0x04,0xf0]
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[0xb3,0xf8,0x04,0xf0]
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# MP: pldw [r4, #-6]
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# MP-ERR: invalid instruction encoding
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# MP-ERR-NEXT: [0x34,0xf8,0x06,0xfc]
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[0x34,0xf8,0x06,0xfc]
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# V6T2: pld [pc, #8]
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[0x9f,0xf8,0x08,0xf0]
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# V6T2: pld [pc, #-5]
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[0x1f,0xf8,0x05,0xf0]
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# V6T2: pld [r5, r6]
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[0x15,0xf8,0x06,0xf0]
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# V6T2: pld [r7, r8, lsl #1]
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[0x17,0xf8,0x18,0xf0]
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# MP: pldw [r9, r10]
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# MP-ERR: invalid instruction encoding
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# MP-ERR-NEXT: [0x39,0xf8,0x0a,0xf0]
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[0x39,0xf8,0x0a,0xf0]
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# MP: pldw [r11, r12, lsl #2]
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# MP-ERR: invalid instruction encoding
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# MP-ERR-NEXT: [0x3b,0xf8,0x2c,0xf0]
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[0x3b,0xf8,0x2c,0xf0]
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# V7: pli [r1, #10]
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# V7-ERR: invalid instruction encoding
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# V7-ERR-NEXT: [0x91,0xf9,0x0a,0xf0]
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[0x91,0xf9,0x0a,0xf0]
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# V7: pli [r2, #-3]
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# V7-ERR: invalid instruction encoding
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# V7-ERR-NEXT: [0x12,0xf9,0x03,0xfc]
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[0x12,0xf9,0x03,0xfc]
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# V7: pli [pc, #6]
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# V7-ERR: invalid instruction encoding
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# V7-ERR-NEXT: [0x9f,0xf9,0x06,0xf0]
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[0x9f,0xf9,0x06,0xf0]
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# V7: pli [pc, #-8]
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# V7-ERR: invalid instruction encoding
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# V7-ERR-NEXT: [0x1f,0xf9,0x08,0xf0]
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[0x1f,0xf9,0x08,0xf0]
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# NO-ERR-NOT: invalid instruction encoding
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