llvm-6502/test/CodeGen
Elena Demikhovsky 002683abc7 AVX-512: Added intrinsic for cvtph2ps.
Added VPTESTNM instruction.
Added a pattern to vselect (lit tests will follow).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200823 91177308-0d34-0410-b5e6-96231b3b80d8
2014-02-05 07:05:03 +00:00
..
AArch64 ARM & AArch64: merge NEON absolute compare intrinsics 2014-02-04 14:55:42 +00:00
ARM Fix PR18345: ldr= pseudo instruction produces incorrect code when using in inline assembly 2014-02-04 17:22:40 +00:00
CPP
Generic
Hexagon DebugInfo: Remove some unneeded conditionals now that DIBuilder no longer emits zero-length arrays as {i32 0} 2014-02-04 01:23:52 +00:00
Inputs
Mips [mips][msa] Add insert.d instruction. 2014-01-31 13:31:20 +00:00
MSP430
NVPTX
PowerPC DebugInfo: Remove some unneeded conditionals now that DIBuilder no longer emits zero-length arrays as {i32 0} 2014-02-04 01:23:52 +00:00
R600 R600/SI: Custom lower i64 ISD::SELECT 2014-02-04 17:18:40 +00:00
SPARC [Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly. 2014-02-01 18:54:16 +00:00
SystemZ
Thumb
Thumb2
X86 AVX-512: Added intrinsic for cvtph2ps. 2014-02-05 07:05:03 +00:00
XCore