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https://github.com/c64scene-ar/llvm-6502.git
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053c1da8d9
only two addressing mode nodes, SPUaform and SPUindirect (vice the three previous ones, SPUaform, SPUdform and SPUxform). This improves code somewhat because we now avoid using reg+reg addressing when it can be avoided. It also simplifies the address selection logic, which was the main point for doing this. Also, for various global variables that would be loaded using SPU's A-form addressing, prefer D-form offs[reg] addressing, keeping the base in a register if the variable is used more than once. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46483 91177308-0d34-0410-b5e6-96231b3b80d8
23 lines
758 B
LLVM
23 lines
758 B
LLVM
; RUN: llvm-as -o - %s | llc -march=cellspu > %t1.s
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; RUN: grep fceq %t1.s | count 1
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; RUN: grep fcmeq %t1.s | count 1
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;
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; This file includes standard floating point arithmetic instructions
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target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
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target triple = "spu"
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declare double @fabs(double)
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declare float @fabsf(float)
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define i1 @fcmp_eq(float %arg1, float %arg2) {
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%A = fcmp oeq float %arg1, %arg2 ; <float> [#uses=1]
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ret i1 %A
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}
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define i1 @fcmp_mag_eq(float %arg1, float %arg2) {
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%A = call float @fabsf(float %arg1) ; <float> [#uses=1]
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%B = call float @fabsf(float %arg2) ; <float> [#uses=1]
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%C = fcmp oeq float %A, %B ; <float> [#uses=1]
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ret i1 %C
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}
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