llvm-6502/test/CodeGen
Tim Northover 004d725549 AArch64: add backend option to reserve x18 (platform register)
AAPCS64 says that it's up to the platform to specify whether x18 is
reserved, and a first step on that way is to add a flag controlling
it.

From: Andrew Turner <andrew@fubar.geek.nz>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226664 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-21 15:43:31 +00:00
..
AArch64 AArch64: add backend option to reserve x18 (platform register) 2015-01-21 15:43:31 +00:00
ARM Bring r226038 back. 2015-01-19 15:16:06 +00:00
CPP
Generic getMangledTypeStr: clarify how it mangles types, and add tests 2015-01-14 23:05:17 +00:00
Hexagon [Hexagon] Adding intrinsics for doubleword ALU operations. 2015-01-20 20:45:05 +00:00
Inputs IR: Move MDLocation into place 2015-01-14 22:27:36 +00:00
Mips [mips] Add registers and ALL check prefix to octeon test case. 2015-01-20 16:14:02 +00:00
MSP430
NVPTX Check that the TLI callback enableAggressiveFMAFusion has the desired effect on FMA folding. 2015-01-14 15:36:28 +00:00
PowerPC [PowerPC] Add r2 as an operand for all calls under both PPC64 ELF V1 and V2 2015-01-19 07:20:27 +00:00
R600 DAGCombine: fold (or (and X, M), (and X, N)) -> (and X, (or M, N)) 2015-01-21 15:43:28 +00:00
SPARC Use the integrated assembler by default on SPARC. 2015-01-14 07:53:39 +00:00
SystemZ Use the integrated assembler as default on SystemZ 2015-01-13 19:45:16 +00:00
Thumb IR: Move MDLocation into place 2015-01-14 22:27:36 +00:00
Thumb2 [ARM] Fix a bug in constant island pass that was triggering an assertion. 2015-01-08 20:44:50 +00:00
X86 DAGCombine: fold (or (and X, M), (and X, N)) -> (and X, (or M, N)) 2015-01-21 15:43:28 +00:00
XCore IR: Move MDLocation into place 2015-01-14 22:27:36 +00:00