Tim Northover 004d725549 AArch64: add backend option to reserve x18 (platform register) ... AAPCS64 says that it's up to the platform to specify whether x18 is reserved, and a first step on that way is to add a flag controlling it. From: Andrew Turner <andrew@fubar.geek.nz> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226664 91177308-0d34-0410-b5e6-96231b3b80d8		2015-01-21 15:43:31 +00:00
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AArch64	AArch64: add backend option to reserve x18 (platform register)	2015-01-21 15:43:31 +00:00
ARM
CPP
Generic
Hexagon	[Hexagon] Adding intrinsics for doubleword ALU operations.	2015-01-20 20:45:05 +00:00
Inputs
Mips	[mips] Add registers and ALL check prefix to octeon test case.	2015-01-20 16:14:02 +00:00
MSP430
NVPTX
PowerPC
R600	DAGCombine: fold (or (and X, M), (and X, N)) -> (and X, (or M, N))	2015-01-21 15:43:28 +00:00
SPARC
SystemZ
Thumb
Thumb2
X86	DAGCombine: fold (or (and X, M), (and X, N)) -> (and X, (or M, N))	2015-01-21 15:43:28 +00:00
XCore