Jakob Stoklund Olesen 00c53caa33 Use MachineInstr::readsWritesVirtualRegister to determine if a register is read. ... This correctly handles partial redefines and undef uses. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104322 91177308-0d34-0410-b5e6-96231b3b80d8		2010-05-21 16:42:30 +00:00
..
Analysis.h	Move several SelectionDAG-independent utility functions out of the	2010-04-21 01:22:34 +00:00
AsmPrinter.h	Rework global alignment computation again. Now we do round up	2010-04-28 19:58:07 +00:00
BinaryObject.h
CalcSpillWeights.h
CallingConvLower.h
FastISel.h	Add initial kill flag support to FastISel.	2010-05-11 23:54:07 +00:00
GCMetadata.h
GCMetadataPrinter.h
GCs.h
GCStrategy.h
IntrinsicLowering.h
ISDOpcodes.h	Elaborate on a comment.	2010-04-29 16:57:54 +00:00
JITCodeEmitter.h	Add a "PadTo" field to the emitULEB128Bytes method. This will pad out to the	2010-04-18 00:51:49 +00:00
LatencyPriorityQueue.h
LinkAllAsmWriterComponents.h
LinkAllCodegenComponents.h	Add a hybrid bottom up scheduler that reduce register usage while avoiding	2010-05-20 06:13:19 +00:00
LiveInterval.h	Removed scaleNumbering method declaration from LiveInterval (not defined, not used).	2010-05-21 03:04:04 +00:00
LiveIntervalAnalysis.h	Teach liveintervalanalysis about virtual registers which are defined by reg_sequence instructions that are formed by registers defined by distinct instructions. e.g.	2010-05-05 18:27:40 +00:00
LiveStackAnalysis.h
LiveVariables.h
MachineBasicBlock.h
MachineCodeEmitter.h
MachineCodeInfo.h
MachineConstantPool.h
MachineDominators.h
MachineFrameInfo.h	Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what	2010-05-14 21:14:32 +00:00
MachineFunction.h	Remove MachineFunction's DefaultDebugLoc member, and make DwarfDebug.cpp	2010-04-20 00:37:27 +00:00
MachineFunctionAnalysis.h
MachineFunctionPass.h
MachineInstr.h	Use MachineInstr::readsWritesVirtualRegister to determine if a register is read.	2010-05-21 16:42:30 +00:00
MachineInstrBuilder.h
MachineJumpTableInfo.h
MachineLocation.h
MachineLoopInfo.h
MachineMemOperand.h
MachineModuleInfo.h
MachineModuleInfoImpls.h
MachineOperand.h
MachinePassRegistry.h
MachineRegisterInfo.h	Add reg_nodbg_iterator	2010-05-15 02:52:58 +00:00
MachineRelocation.h
MachineSSAUpdater.h	Combine the implementations of the core part of the SSAUpdater and	2010-05-04 23:18:19 +00:00
MachORelocation.h
ObjectCodeEmitter.h
Passes.h	Add fast register allocator, enabled with -regalloc=fast.	2010-04-21 18:02:42 +00:00
ProcessImplicitDefs.h
PseudoSourceValue.h
RegAllocRegistry.h
RegisterCoalescer.h
RegisterScavenging.h
RuntimeLibcalls.h
ScheduleDAG.h	Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode.	2010-05-20 23:26:43 +00:00
ScheduleHazardRecognizer.h
SchedulerRegistry.h	Add a hybrid bottom up scheduler that reduce register usage while avoiding	2010-05-20 06:13:19 +00:00
SelectionDAG.h	Implement a bunch more TargetSelectionDAGInfo infrastructure.	2010-05-11 17:31:57 +00:00
SelectionDAGISel.h	Move HandlePHINodesInSuccessorBlocks functions out of SelectionDAGISel	2010-04-22 20:46:50 +00:00
SelectionDAGNodes.h
SlotIndexes.h
TargetLoweringObjectFileImpl.h	More data/parsing support for tls directives. Add a few more testcases	2010-05-17 22:53:55 +00:00
ValueTypes.h	Fix enum to address array bounds regression.	2010-05-18 21:22:12 +00:00
ValueTypes.td	Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.	2010-05-13 23:55:47 +00:00