llvm-6502/test/CodeGen
Jakob Stoklund Olesen 00ce0f6512 Handle i64 FrameIndex nodes in SPARC v9 mode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182216 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-19 19:14:24 +00:00
..
AArch64 More test coverage for addFrameMove. 2013-05-16 20:50:56 +00:00
ARM Support unaligned load/store on more ARM targets 2013-05-17 23:49:01 +00:00
CPP
Generic
Hexagon Hexagon: Pass to replace tranfer/copy instructions into combine instruction 2013-05-14 18:54:06 +00:00
Inputs
MBlaze
Mips [mips] Improve instruction selection for pattern (store (fp_to_sint $src), $ptr). 2013-05-16 21:17:15 +00:00
MSP430 DAGCombiner: Simplify inverted bit tests 2013-05-08 06:44:42 +00:00
NVPTX
PowerPC Check InlineAsm clobbers in PPCCTRLoops 2013-05-18 09:20:39 +00:00
R600 R600: Lower int_load_input to copyFromReg instead of Register node 2013-05-17 16:51:06 +00:00
SI
SPARC Handle i64 FrameIndex nodes in SPARC v9 mode. 2013-05-19 19:14:24 +00:00
SystemZ [SystemZ] Make use of SUBTRACT HALFWORD 2013-05-15 15:05:29 +00:00
Thumb
Thumb2 Fix ARM FastISel tests, as a first step to enabling ARM FastISel 2013-05-14 16:26:38 +00:00
X86 X86: Bad peephole interaction between adc, MOV32r0 2013-05-18 01:02:03 +00:00
XCore [XCore] Fix handling of functions where only the LR is spilled. 2013-05-09 16:43:42 +00:00