Duncan Sands 00e7ea98c0 Use a switch rather than a sequence of "isa" tests. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61872 91177308-0d34-0410-b5e6-96231b3b80d8		2009-01-07 19:10:21 +00:00
..
Analysis	When checking if an Argument escapes, check if	2009-01-05 21:19:53 +00:00
Archive
AsmParser	fix wordo	2009-01-05 18:56:52 +00:00
Bitcode
CodeGen	The coalescer does not coalesce a virtual register to a physical register if any of the physical register's sub-register live intervals overlaps with the virtual register. This is overly conservative. It prevents a extract_subreg from being coalesced away:	2009-01-07 02:08:57 +00:00
Debugger
ExecutionEngine
Linker
Support
System
Target	Add patterns to match conditional moves with loads folded	2009-01-07 01:00:24 +00:00
Transforms	Use a switch rather than a sequence of "isa" tests.	2009-01-07 19:10:21 +00:00
VMCore	Improve support for type-generic vector intrinsics by teaching TableGen how	2009-01-07 00:09:01 +00:00
Makefile