mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-04 07:29:20 +00:00
914f8c4825
Fix that by adding a cast to the shift expander. This came up with vector shifts on sse-less X86 CPUs. <2 x i64> = shl <2 x i64> <2 x i64> -> i64,i64 = shl i64 i64; shl i64 i64 -> i32,i32,i32,i32 = shl_parts i32 i32 i64; shl_parts i32 i32 i64 Now we cast the last two i64s to the right type. Fixes the crash in PR14668. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@173615 91177308-0d34-0410-b5e6-96231b3b80d8
68 lines
1.5 KiB
LLVM
68 lines
1.5 KiB
LLVM
; RUN: llc -mcpu=generic -march=x86 < %s | FileCheck %s
|
|
|
|
define i64 @test1(i32 %xx, i32 %test) nounwind {
|
|
%conv = zext i32 %xx to i64
|
|
%and = and i32 %test, 7
|
|
%sh_prom = zext i32 %and to i64
|
|
%shl = shl i64 %conv, %sh_prom
|
|
ret i64 %shl
|
|
; CHECK: test1:
|
|
; CHECK: shll %cl, %eax
|
|
; CHECK: shrl %edx
|
|
; CHECK: xorb $31
|
|
; CHECK: shrl %cl, %edx
|
|
}
|
|
|
|
define i64 @test2(i64 %xx, i32 %test) nounwind {
|
|
%and = and i32 %test, 7
|
|
%sh_prom = zext i32 %and to i64
|
|
%shl = shl i64 %xx, %sh_prom
|
|
ret i64 %shl
|
|
; CHECK: test2:
|
|
; CHECK: shll %cl, %esi
|
|
; CHECK: shrl %edx
|
|
; CHECK: xorb $31
|
|
; CHECK: shrl %cl, %edx
|
|
; CHECK: orl %esi, %edx
|
|
; CHECK: shll %cl, %eax
|
|
}
|
|
|
|
define i64 @test3(i64 %xx, i32 %test) nounwind {
|
|
%and = and i32 %test, 7
|
|
%sh_prom = zext i32 %and to i64
|
|
%shr = lshr i64 %xx, %sh_prom
|
|
ret i64 %shr
|
|
; CHECK: test3:
|
|
; CHECK: shrl %cl, %esi
|
|
; CHECK: leal (%edx,%edx), %eax
|
|
; CHECK: xorb $31, %cl
|
|
; CHECK: shll %cl, %eax
|
|
; CHECK: orl %esi, %eax
|
|
; CHECK: shrl %cl, %edx
|
|
}
|
|
|
|
define i64 @test4(i64 %xx, i32 %test) nounwind {
|
|
%and = and i32 %test, 7
|
|
%sh_prom = zext i32 %and to i64
|
|
%shr = ashr i64 %xx, %sh_prom
|
|
ret i64 %shr
|
|
; CHECK: test4:
|
|
; CHECK: shrl %cl, %esi
|
|
; CHECK: leal (%edx,%edx), %eax
|
|
; CHECK: xorb $31, %cl
|
|
; CHECK: shll %cl, %eax
|
|
; CHECK: orl %esi, %eax
|
|
; CHECK: sarl %cl, %edx
|
|
}
|
|
|
|
; PR14668
|
|
define <2 x i64> @test5(<2 x i64> %A, <2 x i64> %B) {
|
|
%shl = shl <2 x i64> %A, %B
|
|
ret <2 x i64> %shl
|
|
; CHECK: test5
|
|
; CHECK: shl
|
|
; CHECK: shldl
|
|
; CHECK: shl
|
|
; CHECK: shldl
|
|
}
|