Evan Cheng 0104d9de04 - Assign load / store with shifter op address modes the right itinerary classes. ... - For now, loads of [r, r] addressing mode is the same as the [r, r lsl/lsr/asr #] variants. ARMBaseInstrInfo::getOperandLatency() should identify the former case and reduce the output latency by 1. - Also identify [r, r << 2] case. This special form of shifter addressing mode is "free". git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117519 91177308-0d34-0410-b5e6-96231b3b80d8		2010-10-28 01:49:06 +00:00
..
Analysis	Support TBAA attachments on calls. This is somewhat experimental.	2010-10-25 21:38:20 +00:00
Archive	Revert "CMake: Get rid of LLVMLibDeps.cmake and export the libraries normally."	2010-09-13 23:59:48 +00:00
AsmParser	Add a new 'hotpatch' attribute. This attribute will insert a two-byte no-op	2010-10-25 15:37:09 +00:00
Bitcode	Provide a fast "get me the target triple from the module" API. This can	2010-10-06 01:22:42 +00:00
CodeGen	Fix a major bug in operand latency computation. The use index must be adjusted	2010-10-28 01:46:29 +00:00
CompilerDriver	llvmc: Allow multiple output languages.	2010-09-21 14:59:42 +00:00
ExecutionEngine	Move the remaining attribute macros to systematic names based on the attribute	2010-10-23 08:40:19 +00:00
Linker	Fix PR8300 by remembering to keep the bitcast in all cases.	2010-10-19 02:02:57 +00:00
MC	Add support for R_386_TLS_GD, R_386_TLS_LE_32, R_386_TLS_IE and R_386_TLS_LE.	2010-10-27 21:23:52 +00:00
Support	Extend StringRef's edit-distance algorithm to permit an upper bound on the allowed edit distance	2010-10-19 22:13:48 +00:00
System	80-col violation.	2010-10-27 09:09:10 +00:00
Target	- Assign load / store with shifter op address modes the right itinerary classes.	2010-10-28 01:49:06 +00:00
Transforms	Teach InstCombine not to use Add and Neg on FP. PR 8490.	2010-10-27 23:45:18 +00:00
VMCore	Add a new 'hotpatch' attribute. This attribute will insert a two-byte no-op	2010-10-25 15:37:09 +00:00
Makefile