llvm-6502/test
Quentin Colombet 0119f3df9c [InstCombiner] Slice a big load in two loads when the elements are next to each
other in memory.

The motivation was to get rid of truncate and shift right instructions that get
in the way of paired load or floating point load.
E.g.,
Consider the following example:
struct Complex {
  float real;
  float imm;
};

When accessing a complex, llvm was generating a 64-bits load and the imm field
was obtained by a trunc(lshr) sequence, resulting in poor code generation, at
least for x86.

The idea is to declare that two load instructions is the canonical form for
loading two arithmetic type, which are next to each other in memory.

Two scalar loads at a constant offset from each other are pretty
easy to detect for the sorts of passes that like to mess with loads. 

<rdar://problem/14477220>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190870 91177308-0d34-0410-b5e6-96231b3b80d8
2013-09-17 16:57:34 +00:00
..
Analysis Teach ScalarEvolution about pointer address spaces 2013-09-10 19:55:24 +00:00
Assembler Remove verifier check that attribute 'builtin' is only applied to calls to 2013-09-07 00:25:48 +00:00
Bindings/Ocaml
Bitcode Patch provide by Tom Roeder! 2013-09-12 22:02:31 +00:00
BugPoint
CodeGen Implement 3 AArch64 neon instructions : umov smov ins. 2013-09-17 02:21:02 +00:00
DebugInfo mention command line parameters 2013-09-17 00:15:36 +00:00
ExecutionEngine Add "native" to config.available_features, to make it easier to disable non-x-compile-safe tests 2013-09-13 10:59:01 +00:00
Feature Implement function prefix data as an IR feature. 2013-09-16 01:08:15 +00:00
FileCheck
Instrumentation [msan] Check return value of main(). 2013-09-16 13:24:32 +00:00
Integer
JitListener Debug Info Testing: updated to use NULL instead of "i32 0" in a few fields. 2013-09-06 21:03:58 +00:00
Linker Implement function prefix data as an IR feature. 2013-09-16 01:08:15 +00:00
MC [ARM] Fix the deprecation of MCR encodings that map to CP15{ISB,DSB,DMB}. 2013-09-17 09:54:57 +00:00
Object
Other
TableGen
tools Generate IMAGE_REL_AMD64_ADDR32NB relocations for SEH 2013-09-15 17:46:46 +00:00
Transforms [InstCombiner] Slice a big load in two loads when the elements are next to each 2013-09-17 16:57:34 +00:00
Unit
Verifier
YAMLParser
CMakeLists.txt
lit.cfg Add "native" to config.available_features, to make it easier to disable non-x-compile-safe tests 2013-09-13 10:59:01 +00:00
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh