mirror of
https://github.com/c64scene-ar/llvm-6502.git
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853b919d93
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96639 91177308-0d34-0410-b5e6-96231b3b80d8
563 lines
22 KiB
C++
563 lines
22 KiB
C++
//===- DAGISelMatcherGen.cpp - Matcher generator --------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "DAGISelMatcher.h"
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#include "CodeGenDAGPatterns.h"
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#include "Record.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/StringMap.h"
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using namespace llvm;
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namespace {
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/// ResultVal - When generating new nodes for the result of a pattern match,
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/// this value is used to represent an input to the node. Result values can
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/// either be an input that is 'recorded' in the RecordedNodes array by the
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/// matcher or it can be a temporary value created by the emitter for things
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/// like constants.
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class ResultVal {
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unsigned Number;
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public:
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static ResultVal get(unsigned N) {
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ResultVal R;
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R.Number = N;
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return R;
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}
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unsigned getNumber() const {
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return Number;
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}
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};
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class MatcherGen {
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const PatternToMatch &Pattern;
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const CodeGenDAGPatterns &CGP;
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/// PatWithNoTypes - This is a clone of Pattern.getSrcPattern() that starts
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/// out with all of the types removed. This allows us to insert type checks
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/// as we scan the tree.
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TreePatternNode *PatWithNoTypes;
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/// VariableMap - A map from variable names ('$dst') to the recorded operand
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/// number that they were captured as. These are biased by 1 to make
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/// insertion easier.
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StringMap<unsigned> VariableMap;
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/// NextRecordedOperandNo - As we emit opcodes to record matched values in
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/// the RecordedNodes array, this keeps track of which slot will be next to
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/// record into.
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unsigned NextRecordedOperandNo;
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/// InputChains - This maintains the position in the recorded nodes array of
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/// all of the recorded input chains.
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SmallVector<unsigned, 2> InputChains;
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/// Matcher - This is the top level of the generated matcher, the result.
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MatcherNode *Matcher;
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/// CurPredicate - As we emit matcher nodes, this points to the latest check
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/// which should have future checks stuck into its Next position.
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MatcherNode *CurPredicate;
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public:
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MatcherGen(const PatternToMatch &pattern, const CodeGenDAGPatterns &cgp);
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~MatcherGen() {
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delete PatWithNoTypes;
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}
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void EmitMatcherCode();
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void EmitResultCode();
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MatcherNode *GetMatcher() const { return Matcher; }
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MatcherNode *GetCurPredicate() const { return CurPredicate; }
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private:
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void AddMatcherNode(MatcherNode *NewNode);
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void InferPossibleTypes();
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// Matcher Generation.
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void EmitMatchCode(const TreePatternNode *N, TreePatternNode *NodeNoTypes);
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void EmitLeafMatchCode(const TreePatternNode *N);
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void EmitOperatorMatchCode(const TreePatternNode *N,
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TreePatternNode *NodeNoTypes);
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// Result Code Generation.
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void EmitResultOperand(const TreePatternNode *N,
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SmallVectorImpl<ResultVal> &ResultOps);
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void EmitResultLeafAsOperand(const TreePatternNode *N,
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SmallVectorImpl<ResultVal> &ResultOps);
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void EmitResultInstructionAsOperand(const TreePatternNode *N,
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SmallVectorImpl<ResultVal> &ResultOps);
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};
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} // end anon namespace.
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MatcherGen::MatcherGen(const PatternToMatch &pattern,
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const CodeGenDAGPatterns &cgp)
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: Pattern(pattern), CGP(cgp), NextRecordedOperandNo(0),
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Matcher(0), CurPredicate(0) {
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// We need to produce the matcher tree for the patterns source pattern. To do
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// this we need to match the structure as well as the types. To do the type
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// matching, we want to figure out the fewest number of type checks we need to
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// emit. For example, if there is only one integer type supported by a
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// target, there should be no type comparisons at all for integer patterns!
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//
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// To figure out the fewest number of type checks needed, clone the pattern,
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// remove the types, then perform type inference on the pattern as a whole.
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// If there are unresolved types, emit an explicit check for those types,
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// apply the type to the tree, then rerun type inference. Iterate until all
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// types are resolved.
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//
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PatWithNoTypes = Pattern.getSrcPattern()->clone();
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PatWithNoTypes->RemoveAllTypes();
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// If there are types that are manifestly known, infer them.
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InferPossibleTypes();
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}
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/// InferPossibleTypes - As we emit the pattern, we end up generating type
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/// checks and applying them to the 'PatWithNoTypes' tree. As we do this, we
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/// want to propagate implied types as far throughout the tree as possible so
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/// that we avoid doing redundant type checks. This does the type propagation.
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void MatcherGen::InferPossibleTypes() {
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// TP - Get *SOME* tree pattern, we don't care which. It is only used for
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// diagnostics, which we know are impossible at this point.
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TreePattern &TP = *CGP.pf_begin()->second;
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try {
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bool MadeChange = true;
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while (MadeChange)
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MadeChange = PatWithNoTypes->ApplyTypeConstraints(TP,
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true/*Ignore reg constraints*/);
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} catch (...) {
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errs() << "Type constraint application shouldn't fail!";
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abort();
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}
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}
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/// AddMatcherNode - Add a matcher node to the current graph we're building.
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void MatcherGen::AddMatcherNode(MatcherNode *NewNode) {
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if (CurPredicate != 0)
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CurPredicate->setNext(NewNode);
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else
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Matcher = NewNode;
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CurPredicate = NewNode;
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}
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//===----------------------------------------------------------------------===//
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// Pattern Match Generation
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//===----------------------------------------------------------------------===//
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/// EmitLeafMatchCode - Generate matching code for leaf nodes.
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void MatcherGen::EmitLeafMatchCode(const TreePatternNode *N) {
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assert(N->isLeaf() && "Not a leaf?");
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// Direct match against an integer constant.
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if (IntInit *II = dynamic_cast<IntInit*>(N->getLeafValue()))
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return AddMatcherNode(new CheckIntegerMatcherNode(II->getValue()));
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DefInit *DI = dynamic_cast<DefInit*>(N->getLeafValue());
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if (DI == 0) {
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errs() << "Unknown leaf kind: " << *DI << "\n";
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abort();
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}
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Record *LeafRec = DI->getDef();
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if (// Handle register references. Nothing to do here, they always match.
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LeafRec->isSubClassOf("RegisterClass") ||
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LeafRec->isSubClassOf("PointerLikeRegClass") ||
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LeafRec->isSubClassOf("Register") ||
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// Place holder for SRCVALUE nodes. Nothing to do here.
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LeafRec->getName() == "srcvalue")
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return;
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if (LeafRec->isSubClassOf("ValueType"))
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return AddMatcherNode(new CheckValueTypeMatcherNode(LeafRec->getName()));
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if (LeafRec->isSubClassOf("CondCode"))
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return AddMatcherNode(new CheckCondCodeMatcherNode(LeafRec->getName()));
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if (LeafRec->isSubClassOf("ComplexPattern")) {
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// We can't model ComplexPattern uses that don't have their name taken yet.
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// The OPC_CheckComplexPattern operation implicitly records the results.
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if (N->getName().empty()) {
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errs() << "We expect complex pattern uses to have names: " << *N << "\n";
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exit(1);
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}
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// Handle complex pattern.
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const ComplexPattern &CP = CGP.getComplexPattern(LeafRec);
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AddMatcherNode(new CheckComplexPatMatcherNode(CP));
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// If the complex pattern has a chain, then we need to keep track of the
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// fact that we just recorded a chain input. The chain input will be
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// matched as the last operand of the predicate if it was successful.
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if (CP.hasProperty(SDNPHasChain)) {
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// It is the last operand recorded.
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assert(NextRecordedOperandNo > 1 &&
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"Should have recorded input/result chains at least!");
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InputChains.push_back(NextRecordedOperandNo-1);
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// IF we need to check chains, do so, see comment for
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// "NodeHasProperty(SDNPHasChain" below.
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if (InputChains.size() > 1) {
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// FIXME: This is broken, we should eliminate this nonsense completely,
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// but we want to produce the same selections that the old matcher does
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// for now.
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unsigned PrevOp = InputChains[InputChains.size()-2];
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AddMatcherNode(new CheckChainCompatibleMatcherNode(PrevOp));
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}
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}
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return;
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}
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errs() << "Unknown leaf kind: " << *N << "\n";
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abort();
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}
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void MatcherGen::EmitOperatorMatchCode(const TreePatternNode *N,
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TreePatternNode *NodeNoTypes) {
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assert(!N->isLeaf() && "Not an operator?");
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const SDNodeInfo &CInfo = CGP.getSDNodeInfo(N->getOperator());
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// If this is an 'and R, 1234' where the operation is AND/OR and the RHS is
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// a constant without a predicate fn that has more that one bit set, handle
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// this as a special case. This is usually for targets that have special
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// handling of certain large constants (e.g. alpha with it's 8/16/32-bit
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// handling stuff). Using these instructions is often far more efficient
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// than materializing the constant. Unfortunately, both the instcombiner
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// and the dag combiner can often infer that bits are dead, and thus drop
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// them from the mask in the dag. For example, it might turn 'AND X, 255'
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// into 'AND X, 254' if it knows the low bit is set. Emit code that checks
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// to handle this.
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if ((N->getOperator()->getName() == "and" ||
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N->getOperator()->getName() == "or") &&
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N->getChild(1)->isLeaf() && N->getChild(1)->getPredicateFns().empty()) {
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if (IntInit *II = dynamic_cast<IntInit*>(N->getChild(1)->getLeafValue())) {
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if (!isPowerOf2_32(II->getValue())) { // Don't bother with single bits.
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if (N->getOperator()->getName() == "and")
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AddMatcherNode(new CheckAndImmMatcherNode(II->getValue()));
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else
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AddMatcherNode(new CheckOrImmMatcherNode(II->getValue()));
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// Match the LHS of the AND as appropriate.
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AddMatcherNode(new MoveChildMatcherNode(0));
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EmitMatchCode(N->getChild(0), NodeNoTypes->getChild(0));
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AddMatcherNode(new MoveParentMatcherNode());
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return;
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}
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}
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}
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// Check that the current opcode lines up.
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AddMatcherNode(new CheckOpcodeMatcherNode(CInfo.getEnumName()));
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// If this node has a chain, then the chain is operand #0 is the SDNode, and
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// the child numbers of the node are all offset by one.
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unsigned OpNo = 0;
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if (N->NodeHasProperty(SDNPHasChain, CGP)) {
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// Record the input chain, which is always input #0 of the SDNode.
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AddMatcherNode(new MoveChildMatcherNode(0));
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AddMatcherNode(new RecordMatcherNode("'" + N->getOperator()->getName() +
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"' input chain"));
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// Remember all of the input chains our pattern will match.
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InputChains.push_back(NextRecordedOperandNo);
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++NextRecordedOperandNo;
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AddMatcherNode(new MoveParentMatcherNode());
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// If this is the second (e.g. indbr(load) or store(add(load))) or third
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// input chain (e.g. (store (add (load, load))) from msp430) we need to make
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// sure that folding the chain won't induce cycles in the DAG. This could
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// happen if there were an intermediate node between the indbr and load, for
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// example.
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if (InputChains.size() > 1) {
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// FIXME: This is broken, we should eliminate this nonsense completely,
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// but we want to produce the same selections that the old matcher does
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// for now.
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unsigned PrevOp = InputChains[InputChains.size()-2];
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AddMatcherNode(new CheckChainCompatibleMatcherNode(PrevOp));
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}
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// Don't look at the input chain when matching the tree pattern to the
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// SDNode.
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OpNo = 1;
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// If this node is not the root and the subtree underneath it produces a
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// chain, then the result of matching the node is also produce a chain.
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// Beyond that, this means that we're also folding (at least) the root node
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// into the node that produce the chain (for example, matching
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// "(add reg, (load ptr))" as a add_with_memory on X86). This is
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// problematic, if the 'reg' node also uses the load (say, its chain).
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// Graphically:
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//
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// [LD]
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// ^ ^
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// | \ DAG's like cheese.
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// / |
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// / [YY]
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// | ^
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// [XX]--/
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//
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// It would be invalid to fold XX and LD. In this case, folding the two
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// nodes together would induce a cycle in the DAG, making it a 'cyclic DAG'
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// To prevent this, we emit a dynamic check for legality before allowing
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// this to be folded.
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//
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const TreePatternNode *Root = Pattern.getSrcPattern();
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if (N != Root) { // Not the root of the pattern.
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// If there is a node between the root and this node, then we definitely
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// need to emit the check.
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bool NeedCheck = !Root->hasChild(N);
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// If it *is* an immediate child of the root, we can still need a check if
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// the root SDNode has multiple inputs. For us, this means that it is an
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// intrinsic, has multiple operands, or has other inputs like chain or
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// flag).
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if (!NeedCheck) {
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const SDNodeInfo &PInfo = CGP.getSDNodeInfo(Root->getOperator());
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NeedCheck =
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Root->getOperator() == CGP.get_intrinsic_void_sdnode() ||
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Root->getOperator() == CGP.get_intrinsic_w_chain_sdnode() ||
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Root->getOperator() == CGP.get_intrinsic_wo_chain_sdnode() ||
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PInfo.getNumOperands() > 1 ||
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PInfo.hasProperty(SDNPHasChain) ||
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PInfo.hasProperty(SDNPInFlag) ||
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PInfo.hasProperty(SDNPOptInFlag);
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}
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if (NeedCheck)
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AddMatcherNode(new CheckFoldableChainNodeMatcherNode());
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}
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}
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for (unsigned i = 0, e = N->getNumChildren(); i != e; ++i, ++OpNo) {
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// Get the code suitable for matching this child. Move to the child, check
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// it then move back to the parent.
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AddMatcherNode(new MoveChildMatcherNode(OpNo));
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EmitMatchCode(N->getChild(i), NodeNoTypes->getChild(i));
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AddMatcherNode(new MoveParentMatcherNode());
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}
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}
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void MatcherGen::EmitMatchCode(const TreePatternNode *N,
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TreePatternNode *NodeNoTypes) {
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// If N and NodeNoTypes don't agree on a type, then this is a case where we
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// need to do a type check. Emit the check, apply the tyep to NodeNoTypes and
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// reinfer any correlated types.
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if (NodeNoTypes->getExtTypes() != N->getExtTypes()) {
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AddMatcherNode(new CheckTypeMatcherNode(N->getTypeNum(0)));
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NodeNoTypes->setTypes(N->getExtTypes());
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InferPossibleTypes();
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}
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// If this node has a name associated with it, capture it in VariableMap. If
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// we already saw this in the pattern, emit code to verify dagness.
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if (!N->getName().empty()) {
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unsigned &VarMapEntry = VariableMap[N->getName()];
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if (VarMapEntry == 0) {
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VarMapEntry = NextRecordedOperandNo+1;
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unsigned NumRecorded;
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// If this is a complex pattern, the match operation for it will
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// implicitly record all of the outputs of it (which may be more than
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// one).
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if (const ComplexPattern *AM = N->getComplexPatternInfo(CGP)) {
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// Record the right number of operands.
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NumRecorded = AM->getNumOperands()-1;
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if (AM->hasProperty(SDNPHasChain))
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NumRecorded += 2; // Input and output chains.
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} else {
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// If it is a normal named node, we must emit a 'Record' opcode.
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AddMatcherNode(new RecordMatcherNode("$" + N->getName()));
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NumRecorded = 1;
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}
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NextRecordedOperandNo += NumRecorded;
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} else {
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// If we get here, this is a second reference to a specific name. Since
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// we already have checked that the first reference is valid, we don't
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// have to recursively match it, just check that it's the same as the
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// previously named thing.
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AddMatcherNode(new CheckSameMatcherNode(VarMapEntry-1));
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return;
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}
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}
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// If there are node predicates for this node, generate their checks.
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for (unsigned i = 0, e = N->getPredicateFns().size(); i != e; ++i)
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AddMatcherNode(new CheckPredicateMatcherNode(N->getPredicateFns()[i]));
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if (N->isLeaf())
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EmitLeafMatchCode(N);
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else
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EmitOperatorMatchCode(N, NodeNoTypes);
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}
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void MatcherGen::EmitMatcherCode() {
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// If the pattern has a predicate on it (e.g. only enabled when a subtarget
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// feature is around, do the check).
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if (!Pattern.getPredicateCheck().empty())
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AddMatcherNode(new
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CheckPatternPredicateMatcherNode(Pattern.getPredicateCheck()));
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// Emit the matcher for the pattern structure and types.
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EmitMatchCode(Pattern.getSrcPattern(), PatWithNoTypes);
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}
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//===----------------------------------------------------------------------===//
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// Node Result Generation
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//===----------------------------------------------------------------------===//
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void MatcherGen::EmitResultLeafAsOperand(const TreePatternNode *N,
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SmallVectorImpl<ResultVal> &ResultOps){
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assert(N->isLeaf() && "Must be a leaf");
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if (IntInit *II = dynamic_cast<IntInit*>(N->getLeafValue())) {
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AddMatcherNode(new EmitIntegerMatcherNode(II->getValue(),N->getTypeNum(0)));
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ResultOps.push_back(ResultVal::get(NextRecordedOperandNo++));
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return;
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}
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// If this is an explicit register reference, handle it.
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if (DefInit *DI = dynamic_cast<DefInit*>(N->getLeafValue())) {
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if (DI->getDef()->isSubClassOf("Register")) {
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AddMatcherNode(new EmitRegisterMatcherNode(DI->getDef(),
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N->getTypeNum(0)));
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ResultOps.push_back(ResultVal::get(NextRecordedOperandNo++));
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return;
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}
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if (DI->getDef()->getName() == "zero_reg") {
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AddMatcherNode(new EmitRegisterMatcherNode(0, N->getTypeNum(0)));
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ResultOps.push_back(ResultVal::get(NextRecordedOperandNo++));
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return;
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}
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#if 0
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if (DI->getDef()->isSubClassOf("RegisterClass")) {
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// Handle a reference to a register class. This is used
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// in COPY_TO_SUBREG instructions.
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// FIXME: Implement.
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}
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#endif
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}
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errs() << "unhandled leaf node: \n";
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N->dump();
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}
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void MatcherGen::EmitResultInstructionAsOperand(const TreePatternNode *N,
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SmallVectorImpl<ResultVal> &ResultOps){
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Record *Op = N->getOperator();
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const CodeGenTarget &CGT = CGP.getTargetInfo();
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CodeGenInstruction &II = CGT.getInstruction(Op->getName());
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const DAGInstruction &Inst = CGP.getInstruction(Op);
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// FIXME: Handle (set x, (foo))
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if (II.isVariadic) // FIXME: Handle variadic instructions.
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return AddMatcherNode(new EmitNodeMatcherNode(Pattern));
|
|
|
|
// FIXME: Handle OptInFlag, HasInFlag, HasOutFlag
|
|
// FIXME: Handle Chains.
|
|
unsigned NumResults = Inst.getNumResults();
|
|
|
|
|
|
// Loop over all of the operands of the instruction pattern, emitting code
|
|
// to fill them all in. The node 'N' usually has number children equal to
|
|
// the number of input operands of the instruction. However, in cases
|
|
// where there are predicate operands for an instruction, we need to fill
|
|
// in the 'execute always' values. Match up the node operands to the
|
|
// instruction operands to do this.
|
|
SmallVector<ResultVal, 8> Ops;
|
|
for (unsigned ChildNo = 0, InstOpNo = NumResults, e = II.OperandList.size();
|
|
InstOpNo != e; ++InstOpNo) {
|
|
|
|
// Determine what to emit for this operand.
|
|
Record *OperandNode = II.OperandList[InstOpNo].Rec;
|
|
if ((OperandNode->isSubClassOf("PredicateOperand") ||
|
|
OperandNode->isSubClassOf("OptionalDefOperand")) &&
|
|
!CGP.getDefaultOperand(OperandNode).DefaultOps.empty()) {
|
|
// This is a predicate or optional def operand; emit the
|
|
// 'default ops' operands.
|
|
const DAGDefaultOperand &DefaultOp =
|
|
CGP.getDefaultOperand(II.OperandList[InstOpNo].Rec);
|
|
for (unsigned i = 0, e = DefaultOp.DefaultOps.size(); i != e; ++i)
|
|
EmitResultOperand(DefaultOp.DefaultOps[i], Ops);
|
|
continue;
|
|
}
|
|
|
|
// Otherwise this is a normal operand or a predicate operand without
|
|
// 'execute always'; emit it.
|
|
EmitResultOperand(N->getChild(ChildNo), Ops);
|
|
++ChildNo;
|
|
}
|
|
|
|
// FIXME: Chain.
|
|
// FIXME: Flag
|
|
|
|
|
|
|
|
return;
|
|
}
|
|
|
|
void MatcherGen::EmitResultOperand(const TreePatternNode *N,
|
|
SmallVectorImpl<ResultVal> &ResultOps) {
|
|
// This is something selected from the pattern we matched.
|
|
if (!N->getName().empty()) {
|
|
//errs() << "unhandled named node: \n";
|
|
//N->dump();
|
|
return;
|
|
}
|
|
|
|
if (N->isLeaf())
|
|
return EmitResultLeafAsOperand(N, ResultOps);
|
|
|
|
Record *OpRec = N->getOperator();
|
|
if (OpRec->isSubClassOf("Instruction"))
|
|
return EmitResultInstructionAsOperand(N, ResultOps);
|
|
if (OpRec->isSubClassOf("SDNodeXForm"))
|
|
// FIXME: implement.
|
|
return;
|
|
errs() << "Unknown result node to emit code for: " << *N << '\n';
|
|
throw std::string("Unknown node in result pattern!");
|
|
}
|
|
|
|
void MatcherGen::EmitResultCode() {
|
|
// FIXME: Handle Ops.
|
|
// FIXME: Ops should be vector of "ResultValue> which is either an index into
|
|
// the results vector is is a temp result.
|
|
SmallVector<ResultVal, 8> Ops;
|
|
EmitResultOperand(Pattern.getDstPattern(), Ops);
|
|
//AddMatcherNode(new EmitNodeMatcherNode(Pattern));
|
|
}
|
|
|
|
|
|
MatcherNode *llvm::ConvertPatternToMatcher(const PatternToMatch &Pattern,
|
|
const CodeGenDAGPatterns &CGP) {
|
|
MatcherGen Gen(Pattern, CGP);
|
|
|
|
// Generate the code for the matcher.
|
|
Gen.EmitMatcherCode();
|
|
|
|
// If the match succeeds, then we generate Pattern.
|
|
Gen.EmitResultCode();
|
|
|
|
// Unconditional match.
|
|
return Gen.GetMatcher();
|
|
}
|
|
|
|
|
|
|