Petar Jovanovic 01b026b023 Re-enable target-specific relocation table sorting and use it for Mips ... Some targets (ie. Mips) have additional rules for ordering the relocation table entries. Allow them to override generic sortRelocs(), which sorts entries by Offset. Then override this function for Mips, to emit HI16 and GOT16 relocations against the local symbol in pair with the corresponding LO16 relocation. Patch by Vladimir Stefanovic. Differential Revision: http://reviews.llvm.org/D7414 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@234883 91177308-0d34-0410-b5e6-96231b3b80d8		2015-04-14 13:23:34 +00:00
..
AArch64	AArch64: disallow "fmov sD, #-0.0" during assembly.	2015-04-07 22:49:47 +00:00
ARM	Write the section header in the end.	2015-04-08 11:41:24 +00:00
AsmParser
COFF
Disassembler	Add direct moves to/from VSR and exploit them for FP/INT conversions	2015-04-11 10:40:42 +00:00
ELF	Write the section header in the end.	2015-04-08 11:41:24 +00:00
Hexagon
MachO	MC: For variable symbols, maintain MCSymbol::Section as a cache.	2015-04-03 01:46:11 +00:00
Markup
Mips	Re-enable target-specific relocation table sorting and use it for Mips	2015-04-14 13:23:34 +00:00
PowerPC	Add direct moves to/from VSR and exploit them for FP/INT conversions	2015-04-11 10:40:42 +00:00
R600	R600/SI: Initial support for assembler and inline assembly	2015-04-08 01:09:26 +00:00
Sparc
SystemZ
X86	[MC] Write padding into fragments when -mc-relax-all flag is used	2015-04-12 23:42:25 +00:00