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https://github.com/c64scene-ar/llvm-6502.git
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51c31d6888
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70722 91177308-0d34-0410-b5e6-96231b3b80d8
75 lines
2.3 KiB
C++
75 lines
2.3 KiB
C++
//===- MSP430InstrInfo.cpp - MSP430 Instruction Information ---------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the MSP430 implementation of the TargetInstrInfo class.
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//
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//===----------------------------------------------------------------------===//
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#include "MSP430.h"
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#include "MSP430InstrInfo.h"
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#include "MSP430TargetMachine.h"
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#include "MSP430GenInstrInfo.inc"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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using namespace llvm;
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MSP430InstrInfo::MSP430InstrInfo(MSP430TargetMachine &tm)
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: TargetInstrInfoImpl(MSP430Insts, array_lengthof(MSP430Insts)),
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RI(*this), TM(tm) {}
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bool MSP430InstrInfo::copyRegToReg(MachineBasicBlock &MBB,
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MachineBasicBlock::iterator I,
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unsigned DestReg, unsigned SrcReg,
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const TargetRegisterClass *DestRC,
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const TargetRegisterClass *SrcRC) const {
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DebugLoc DL = DebugLoc::getUnknownLoc();
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if (I != MBB.end()) DL = I->getDebugLoc();
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if (DestRC == SrcRC) {
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unsigned Opc;
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if (DestRC == &MSP430::GR16RegClass) {
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Opc = MSP430::MOV16rr;
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} else if (DestRC == &MSP430::GR8RegClass) {
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Opc = MSP430::MOV8rr;
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} else {
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return false;
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}
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BuildMI(MBB, I, DL, get(Opc), DestReg).addReg(SrcReg);
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return true;
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}
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return false;
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}
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bool
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MSP430InstrInfo::isMoveInstr(const MachineInstr& MI,
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unsigned &SrcReg, unsigned &DstReg,
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unsigned &SrcSubIdx, unsigned &DstSubIdx) const {
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SrcSubIdx = DstSubIdx = 0; // No sub-registers yet.
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switch (MI.getOpcode()) {
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default:
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return false;
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case MSP430::MOV8rr:
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case MSP430::MOV16rr:
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assert(MI.getNumOperands() >= 2 &&
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MI.getOperand(0).isReg() &&
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MI.getOperand(1).isReg() &&
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"invalid register-register move instruction");
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SrcReg = MI.getOperand(1).getReg();
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DstReg = MI.getOperand(0).getReg();
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return true;
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}
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}
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