Simon Pilgrim 01e39346f3 [X86][SSE] Improve legal SHUFP and PSHUFD shuffle matching ...

Updated X86TargetLowering::isShuffleMaskLegal to match SHUFP masks with commuted inputs and PSHUFD masks that reference the second input.

As part of this I've refactored isPSHUFDMask to work in a more general manner and allow it to match against either the first or second input vector.

Differential Revision: http://reviews.llvm.org/D6287



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222087 91177308-0d34-0410-b5e6-96231b3b80d8

2014-11-15 21:13:05 +00:00

..

AArch64

[FastISel][AArch64] Don't bail during simple GEP instruction selection.

2014-11-13 20:50:44 +00:00

ARM

ARM: refactor .cfi_def_cfa_offset emission.

2014-11-14 22:45:33 +00:00

CPP

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Generic

Revert "Revert "DI: Fold constant arguments into a single MDString""

2014-10-03 20:01:09 +00:00

Hexagon

Handle ctor/init_array initialization.

2014-11-03 14:56:05 +00:00

Inputs

Revert "Revert "DI: Fold constant arguments into a single MDString""

2014-10-03 20:01:09 +00:00

Mips

First stage of call lowering for Mips fast-isel

2014-11-13 23:37:45 +00:00

MSP430

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NVPTX

[NVPTX] Add NVPTXLowerStructArgs pass

2014-11-05 18:19:30 +00:00

PowerPC

[PowerPC] Add VSX builtins for vec_div

2014-11-14 12:10:40 +00:00

R600

R600: Permute operands when selecting legacy min/max

2014-11-15 05:02:57 +00:00

SPARC

Add back tests for empty function in SPARC and PowerPC.

2014-09-15 22:11:07 +00:00

SystemZ

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Thumb

Improve logic that decides if its profitable to commute when some of the virtual registers involved have uses/defs chains connecting them to physical register. Fix up the tests that this change improves.

2014-11-05 06:43:02 +00:00

Thumb2

ARM: allow constpool entry to be moved to the user's block in all cases.

2014-11-13 17:58:53 +00:00

X86

[X86][SSE] Improve legal SHUFP and PSHUFD shuffle matching

2014-11-15 21:13:05 +00:00

XCore

Fix a bit of confusion about .set and produce more readable assembly.

2014-10-21 01:17:30 +00:00