llvm-6502/test/CodeGen/NVPTX
Justin Holewinski 1ce53cb526 [NVPTX] Fix handling of vector arguments
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177847 91177308-0d34-0410-b5e6-96231b3b80d8
2013-03-24 21:17:47 +00:00
..
annotations.ll
arithmetic-fp-sm10.ll
arithmetic-fp-sm20.ll
arithmetic-int.ll
calling-conv.ll
compare-int.ll
convert-fp.ll
convert-int-sm10.ll
convert-int-sm20.ll
fma-disable.ll
fma.ll
global-ordering.ll
intrin-nocapture.ll
intrinsic-old.ll
intrinsics.ll
ld-addrspace.ll
ld-generic.ll
lit.local.cfg
param-align.ll
pr13291-i1-store.ll
ptx-version-30.ll
ptx-version-31.ll
sched1.ll Propagate DAG node ordering during type legalization and instruction selection 2013-03-20 00:10:32 +00:00
sched2.ll Propagate DAG node ordering during type legalization and instruction selection 2013-03-20 00:10:32 +00:00
simple-call.ll
sm-version-10.ll
sm-version-11.ll
sm-version-12.ll
sm-version-13.ll
sm-version-20.ll
sm-version-21.ll
sm-version-30.ll
sm-version-35.ll
st-addrspace.ll
st-generic.ll
tuple-literal.ll
vector-args.ll [NVPTX] Fix handling of vector arguments 2013-03-24 21:17:47 +00:00
vector-compare.ll
vector-loads.ll Propagate DAG node ordering during type legalization and instruction selection 2013-03-20 00:10:32 +00:00
vector-select.ll