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take multiple cycles to decode. For the current if-converter clients (actually only ARM), the instructions that are predicated on false are not nops. They would still take machine cycles to decode. Micro-coded instructions such as LDM / STM can potentially take multiple cycles to decode. If-converter should take treat them as non-micro-coded simple instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@113570 91177308-0d34-0410-b5e6-96231b3b80d8
41 lines
1.1 KiB
C++
41 lines
1.1 KiB
C++
//===-- Thumb2HazardRecognizer.h - Thumb2 Hazard Recognizers ----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines hazard recognizers for scheduling Thumb2 functions on
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// ARM processors.
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//
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//===----------------------------------------------------------------------===//
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#ifndef THUMB2HAZARDRECOGNIZER_H
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#define THUMB2HAZARDRECOGNIZER_H
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#include "llvm/CodeGen/PostRAHazardRecognizer.h"
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namespace llvm {
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class MachineInstr;
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class Thumb2HazardRecognizer : public PostRAHazardRecognizer {
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unsigned ITBlockSize; // No. of MIs in current IT block yet to be scheduled.
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MachineInstr *ITBlockMIs[4];
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public:
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Thumb2HazardRecognizer(const InstrItineraryData *ItinData) :
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PostRAHazardRecognizer(ItinData) {}
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virtual HazardType getHazardType(SUnit *SU);
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virtual void Reset();
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virtual void EmitInstruction(SUnit *SU);
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};
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} // end namespace llvm
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#endif // THUMB2HAZARDRECOGNIZER_H
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