Hal Finkel 025c1cefca When using CR bit registers on PPC32, handle the i1 vaarg case ... When copying an i1 value into a GPR for a vaarg call, we need to explicitly zero-extend the i1 value (otherwise an invalid CRBIT -> GPR copy will be generated). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203041 91177308-0d34-0410-b5e6-96231b3b80d8		2014-03-06 00:23:33 +00:00
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AArch64	Revert "[AArch64] This is a work in progress to provide a machine description"	2014-03-04 00:32:07 +00:00
ARM	ARM: Correctly align arguments after a byval struct is passed on the stack	2014-03-05 15:25:27 +00:00
CPP
Generic
Hexagon
Inputs
Mips	[Mips] Testcase typo fix. No functionality change.	2014-03-05 22:54:56 +00:00
MSP430
NVPTX
PowerPC	When using CR bit registers on PPC32, handle the i1 vaarg case	2014-03-06 00:23:33 +00:00
R600	R600: Add failing control flow tests.	2014-03-01 21:45:41 +00:00
SPARC	[Sparc] Add support for parsing directives in SparcAsmParser.	2014-03-01 02:18:04 +00:00
SystemZ
Thumb
Thumb2
X86	Always print the implicit .text at the start of an asm file.	2014-03-05 20:09:15 +00:00
XCore	[XCore] Fix call of absolute address.	2014-03-04 16:50:30 +00:00