llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-13 20:32:21 +00:00

History

Jeffrey Yasskin 0261d795f8 Allow more than one stub to be being generated at the same time. It's probably better in the long run to replace the indirect-GlobalVariable system. That'll be done after a subsequent patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@89708 91177308-0d34-0410-b5e6-96231b3b80d8		2009-11-23 22:49:00 +00:00
..
AsmPrinter	Move DebugInfo checks into EmitComments and remove them from	2009-11-13 21:34:57 +00:00
TargetInfo
Alpha.h
Alpha.td
AlphaBranchSelector.cpp	Remove includes of Support/Compiler.h that are no longer needed after the	2009-10-25 06:57:41 +00:00
AlphaCallingConv.td
AlphaCodeEmitter.cpp	Remove includes of Support/Compiler.h that are no longer needed after the	2009-10-25 06:57:41 +00:00
AlphaInstrFormats.td
AlphaInstrInfo.cpp
AlphaInstrInfo.h
AlphaInstrInfo.td	Set isBarrier = 1 on return instructions, as they are control barriers.	2009-11-11 18:11:07 +00:00
AlphaISelDAGToDAG.cpp	Remove uninteresting and confusing debug output.	2009-11-05 18:47:09 +00:00
AlphaISelLowering.cpp	We are not using DBG_STOPPOINT anymore.	2009-11-21 02:46:55 +00:00
AlphaISelLowering.h	Add a second ValueType argument to isFPImmLegal.	2009-10-28 01:43:28 +00:00
AlphaJITInfo.cpp	Allow more than one stub to be being generated at the same time.	2009-11-23 22:49:00 +00:00
AlphaJITInfo.h
AlphaLLRP.cpp
AlphaMachineFunctionInfo.h
AlphaMCAsmInfo.cpp
AlphaMCAsmInfo.h
AlphaRegisterInfo.cpp	Make the MachineFunction argument of getFrameRegister const.	2009-11-12 21:00:03 +00:00
AlphaRegisterInfo.h	Make the MachineFunction argument of getFrameRegister const.	2009-11-12 21:00:03 +00:00
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetMachine.cpp	indicate what the native integer types for the target are.	2009-11-07 19:07:32 +00:00
AlphaTargetMachine.h
CMakeLists.txt
Makefile
README.txt

README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html