mirror of
https://github.com/c64scene-ar/llvm-6502.git
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207196 91177308-0d34-0410-b5e6-96231b3b80d8
489 lines
16 KiB
C++
489 lines
16 KiB
C++
//===- FlatternCFG.cpp - Code to perform CFG flattening ---------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// Reduce conditional branches in CFG.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/Transforms/Utils/Local.h"
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#include "llvm/ADT/SmallPtrSet.h"
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#include "llvm/Analysis/AliasAnalysis.h"
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#include "llvm/Analysis/ValueTracking.h"
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#include "llvm/IR/IRBuilder.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Transforms/Utils/BasicBlockUtils.h"
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using namespace llvm;
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#define DEBUG_TYPE "flattencfg"
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namespace {
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class FlattenCFGOpt {
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AliasAnalysis *AA;
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/// \brief Use parallel-and or parallel-or to generate conditions for
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/// conditional branches.
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bool FlattenParallelAndOr(BasicBlock *BB, IRBuilder<> &Builder,
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Pass *P = nullptr);
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/// \brief If \param BB is the merge block of an if-region, attempt to merge
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/// the if-region with an adjacent if-region upstream if two if-regions
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/// contain identical instructions.
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bool MergeIfRegion(BasicBlock *BB, IRBuilder<> &Builder, Pass *P = nullptr);
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/// \brief Compare a pair of blocks: \p Block1 and \p Block2, which
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/// are from two if-regions whose entry blocks are \p Head1 and \p
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/// Head2. \returns true if \p Block1 and \p Block2 contain identical
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/// instructions, and have no memory reference alias with \p Head2.
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/// This is used as a legality check for merging if-regions.
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bool CompareIfRegionBlock(BasicBlock *Head1, BasicBlock *Head2,
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BasicBlock *Block1, BasicBlock *Block2);
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public:
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FlattenCFGOpt(AliasAnalysis *AA) : AA(AA) {}
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bool run(BasicBlock *BB);
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};
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}
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/// If \param [in] BB has more than one predecessor that is a conditional
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/// branch, attempt to use parallel and/or for the branch condition. \returns
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/// true on success.
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///
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/// Before:
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/// ......
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/// %cmp10 = fcmp une float %tmp1, %tmp2
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/// br i1 %cmp1, label %if.then, label %lor.rhs
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///
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/// lor.rhs:
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/// ......
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/// %cmp11 = fcmp une float %tmp3, %tmp4
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/// br i1 %cmp11, label %if.then, label %ifend
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///
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/// if.end: // the merge block
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/// ......
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///
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/// if.then: // has two predecessors, both of them contains conditional branch.
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/// ......
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/// br label %if.end;
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///
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/// After:
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/// ......
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/// %cmp10 = fcmp une float %tmp1, %tmp2
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/// ......
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/// %cmp11 = fcmp une float %tmp3, %tmp4
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/// %cmp12 = or i1 %cmp10, %cmp11 // parallel-or mode.
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/// br i1 %cmp12, label %if.then, label %ifend
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///
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/// if.end:
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/// ......
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///
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/// if.then:
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/// ......
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/// br label %if.end;
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///
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/// Current implementation handles two cases.
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/// Case 1: \param BB is on the else-path.
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///
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/// BB1
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/// / |
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/// BB2 |
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/// / \ |
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/// BB3 \ | where, BB1, BB2 contain conditional branches.
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/// \ | / BB3 contains unconditional branch.
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/// \ | / BB4 corresponds to \param BB which is also the merge.
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/// BB => BB4
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///
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///
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/// Corresponding source code:
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///
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/// if (a == b && c == d)
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/// statement; // BB3
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///
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/// Case 2: \param BB BB is on the then-path.
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///
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/// BB1
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/// / |
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/// | BB2
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/// \ / | where BB1, BB2 contain conditional branches.
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/// BB => BB3 | BB3 contains unconditiona branch and corresponds
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/// \ / to \param BB. BB4 is the merge.
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/// BB4
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///
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/// Corresponding source code:
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///
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/// if (a == b || c == d)
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/// statement; // BB3
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///
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/// In both cases, \param BB is the common successor of conditional branches.
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/// In Case 1, \param BB (BB4) has an unconditional branch (BB3) as
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/// its predecessor. In Case 2, \param BB (BB3) only has conditional branches
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/// as its predecessors.
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///
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bool FlattenCFGOpt::FlattenParallelAndOr(BasicBlock *BB, IRBuilder<> &Builder,
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Pass *P) {
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PHINode *PHI = dyn_cast<PHINode>(BB->begin());
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if (PHI)
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return false; // For simplicity, avoid cases containing PHI nodes.
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BasicBlock *LastCondBlock = nullptr;
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BasicBlock *FirstCondBlock = nullptr;
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BasicBlock *UnCondBlock = nullptr;
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int Idx = -1;
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// Check predecessors of \param BB.
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SmallPtrSet<BasicBlock *, 16> Preds(pred_begin(BB), pred_end(BB));
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for (SmallPtrSetIterator<BasicBlock *> PI = Preds.begin(), PE = Preds.end();
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PI != PE; ++PI) {
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BasicBlock *Pred = *PI;
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BranchInst *PBI = dyn_cast<BranchInst>(Pred->getTerminator());
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// All predecessors should terminate with a branch.
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if (!PBI)
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return false;
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BasicBlock *PP = Pred->getSinglePredecessor();
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if (PBI->isUnconditional()) {
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// Case 1: Pred (BB3) is an unconditional block, it should
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// have a single predecessor (BB2) that is also a predecessor
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// of \param BB (BB4) and should not have address-taken.
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// There should exist only one such unconditional
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// branch among the predecessors.
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if (UnCondBlock || !PP || (Preds.count(PP) == 0) ||
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Pred->hasAddressTaken())
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return false;
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UnCondBlock = Pred;
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continue;
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}
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// Only conditional branches are allowed beyond this point.
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assert(PBI->isConditional());
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// Condition's unique use should be the branch instruction.
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Value *PC = PBI->getCondition();
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if (!PC || !PC->hasOneUse())
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return false;
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if (PP && Preds.count(PP)) {
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// These are internal condition blocks to be merged from, e.g.,
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// BB2 in both cases.
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// Should not be address-taken.
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if (Pred->hasAddressTaken())
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return false;
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// Instructions in the internal condition blocks should be safe
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// to hoist up.
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for (BasicBlock::iterator BI = Pred->begin(), BE = PBI; BI != BE;) {
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Instruction *CI = BI++;
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if (isa<PHINode>(CI) || !isSafeToSpeculativelyExecute(CI))
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return false;
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}
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} else {
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// This is the condition block to be merged into, e.g. BB1 in
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// both cases.
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if (FirstCondBlock)
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return false;
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FirstCondBlock = Pred;
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}
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// Find whether BB is uniformly on the true (or false) path
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// for all of its predecessors.
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BasicBlock *PS1 = PBI->getSuccessor(0);
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BasicBlock *PS2 = PBI->getSuccessor(1);
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BasicBlock *PS = (PS1 == BB) ? PS2 : PS1;
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int CIdx = (PS1 == BB) ? 0 : 1;
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if (Idx == -1)
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Idx = CIdx;
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else if (CIdx != Idx)
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return false;
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// PS is the successor which is not BB. Check successors to identify
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// the last conditional branch.
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if (Preds.count(PS) == 0) {
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// Case 2.
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LastCondBlock = Pred;
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} else {
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// Case 1
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BranchInst *BPS = dyn_cast<BranchInst>(PS->getTerminator());
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if (BPS && BPS->isUnconditional()) {
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// Case 1: PS(BB3) should be an unconditional branch.
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LastCondBlock = Pred;
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}
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}
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}
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if (!FirstCondBlock || !LastCondBlock || (FirstCondBlock == LastCondBlock))
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return false;
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TerminatorInst *TBB = LastCondBlock->getTerminator();
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BasicBlock *PS1 = TBB->getSuccessor(0);
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BasicBlock *PS2 = TBB->getSuccessor(1);
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BranchInst *PBI1 = dyn_cast<BranchInst>(PS1->getTerminator());
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BranchInst *PBI2 = dyn_cast<BranchInst>(PS2->getTerminator());
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// If PS1 does not jump into PS2, but PS2 jumps into PS1,
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// attempt branch inversion.
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if (!PBI1 || !PBI1->isUnconditional() ||
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(PS1->getTerminator()->getSuccessor(0) != PS2)) {
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// Check whether PS2 jumps into PS1.
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if (!PBI2 || !PBI2->isUnconditional() ||
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(PS2->getTerminator()->getSuccessor(0) != PS1))
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return false;
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// Do branch inversion.
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BasicBlock *CurrBlock = LastCondBlock;
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bool EverChanged = false;
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while (1) {
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BranchInst *BI = dyn_cast<BranchInst>(CurrBlock->getTerminator());
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CmpInst *CI = dyn_cast<CmpInst>(BI->getCondition());
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CmpInst::Predicate Predicate = CI->getPredicate();
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// Canonicalize icmp_ne -> icmp_eq, fcmp_one -> fcmp_oeq
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if ((Predicate == CmpInst::ICMP_NE) || (Predicate == CmpInst::FCMP_ONE)) {
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CI->setPredicate(ICmpInst::getInversePredicate(Predicate));
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BI->swapSuccessors();
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EverChanged = true;
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}
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if (CurrBlock == FirstCondBlock)
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break;
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CurrBlock = CurrBlock->getSinglePredecessor();
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}
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return EverChanged;
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}
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// PS1 must have a conditional branch.
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if (!PBI1 || !PBI1->isUnconditional())
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return false;
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// PS2 should not contain PHI node.
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PHI = dyn_cast<PHINode>(PS2->begin());
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if (PHI)
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return false;
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// Do the transformation.
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BasicBlock *CB;
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BranchInst *PBI = dyn_cast<BranchInst>(FirstCondBlock->getTerminator());
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bool Iteration = true;
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IRBuilder<>::InsertPointGuard Guard(Builder);
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Value *PC = PBI->getCondition();
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do {
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CB = PBI->getSuccessor(1 - Idx);
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// Delete the conditional branch.
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FirstCondBlock->getInstList().pop_back();
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FirstCondBlock->getInstList()
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.splice(FirstCondBlock->end(), CB->getInstList());
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PBI = cast<BranchInst>(FirstCondBlock->getTerminator());
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Value *CC = PBI->getCondition();
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// Merge conditions.
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Builder.SetInsertPoint(PBI);
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Value *NC;
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if (Idx == 0)
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// Case 2, use parallel or.
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NC = Builder.CreateOr(PC, CC);
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else
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// Case 1, use parallel and.
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NC = Builder.CreateAnd(PC, CC);
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PBI->replaceUsesOfWith(CC, NC);
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PC = NC;
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if (CB == LastCondBlock)
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Iteration = false;
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// Remove internal conditional branches.
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CB->dropAllReferences();
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// make CB unreachable and let downstream to delete the block.
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new UnreachableInst(CB->getContext(), CB);
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} while (Iteration);
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DEBUG(dbgs() << "Use parallel and/or in:\n" << *FirstCondBlock);
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return true;
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}
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/// Compare blocks from two if-regions, where \param Head1 is the entry of the
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/// 1st if-region. \param Head2 is the entry of the 2nd if-region. \param
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/// Block1 is a block in the 1st if-region to compare. \param Block2 is a block
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// in the 2nd if-region to compare. \returns true if \param Block1 and \param
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/// Block2 have identical instructions and do not have memory reference alias
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/// with \param Head2.
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///
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bool FlattenCFGOpt::CompareIfRegionBlock(BasicBlock *Head1, BasicBlock *Head2,
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BasicBlock *Block1,
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BasicBlock *Block2) {
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TerminatorInst *PTI2 = Head2->getTerminator();
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Instruction *PBI2 = Head2->begin();
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bool eq1 = (Block1 == Head1);
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bool eq2 = (Block2 == Head2);
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if (eq1 || eq2) {
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// An empty then-path or else-path.
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return (eq1 == eq2);
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}
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// Check whether instructions in Block1 and Block2 are identical
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// and do not alias with instructions in Head2.
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BasicBlock::iterator iter1 = Block1->begin();
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BasicBlock::iterator end1 = Block1->getTerminator();
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BasicBlock::iterator iter2 = Block2->begin();
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BasicBlock::iterator end2 = Block2->getTerminator();
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while (1) {
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if (iter1 == end1) {
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if (iter2 != end2)
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return false;
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break;
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}
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if (!iter1->isIdenticalTo(iter2))
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return false;
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// Illegal to remove instructions with side effects except
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// non-volatile stores.
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if (iter1->mayHaveSideEffects()) {
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Instruction *CurI = &*iter1;
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StoreInst *SI = dyn_cast<StoreInst>(CurI);
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if (!SI || SI->isVolatile())
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return false;
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}
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// For simplicity and speed, data dependency check can be
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// avoided if read from memory doesn't exist.
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if (iter1->mayReadFromMemory())
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return false;
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if (iter1->mayWriteToMemory()) {
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for (BasicBlock::iterator BI = PBI2, BE = PTI2; BI != BE; ++BI) {
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if (BI->mayReadFromMemory() || BI->mayWriteToMemory()) {
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// Check alias with Head2.
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if (!AA || AA->alias(iter1, BI))
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return false;
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}
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}
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}
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++iter1;
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++iter2;
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}
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return true;
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}
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/// Check whether \param BB is the merge block of a if-region. If yes, check
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/// whether there exists an adjacent if-region upstream, the two if-regions
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/// contain identical instructions and can be legally merged. \returns true if
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/// the two if-regions are merged.
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///
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/// From:
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/// if (a)
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/// statement;
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/// if (b)
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/// statement;
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///
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/// To:
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/// if (a || b)
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/// statement;
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///
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bool FlattenCFGOpt::MergeIfRegion(BasicBlock *BB, IRBuilder<> &Builder,
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Pass *P) {
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BasicBlock *IfTrue2, *IfFalse2;
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Value *IfCond2 = GetIfCondition(BB, IfTrue2, IfFalse2);
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Instruction *CInst2 = dyn_cast_or_null<Instruction>(IfCond2);
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if (!CInst2)
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return false;
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BasicBlock *SecondEntryBlock = CInst2->getParent();
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if (SecondEntryBlock->hasAddressTaken())
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return false;
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BasicBlock *IfTrue1, *IfFalse1;
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Value *IfCond1 = GetIfCondition(SecondEntryBlock, IfTrue1, IfFalse1);
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Instruction *CInst1 = dyn_cast_or_null<Instruction>(IfCond1);
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if (!CInst1)
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return false;
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BasicBlock *FirstEntryBlock = CInst1->getParent();
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// Either then-path or else-path should be empty.
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if ((IfTrue1 != FirstEntryBlock) && (IfFalse1 != FirstEntryBlock))
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return false;
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if ((IfTrue2 != SecondEntryBlock) && (IfFalse2 != SecondEntryBlock))
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return false;
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TerminatorInst *PTI2 = SecondEntryBlock->getTerminator();
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Instruction *PBI2 = SecondEntryBlock->begin();
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if (!CompareIfRegionBlock(FirstEntryBlock, SecondEntryBlock, IfTrue1,
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IfTrue2))
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return false;
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if (!CompareIfRegionBlock(FirstEntryBlock, SecondEntryBlock, IfFalse1,
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IfFalse2))
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return false;
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// Check whether \param SecondEntryBlock has side-effect and is safe to
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// speculate.
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for (BasicBlock::iterator BI = PBI2, BE = PTI2; BI != BE; ++BI) {
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Instruction *CI = BI;
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if (isa<PHINode>(CI) || CI->mayHaveSideEffects() ||
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!isSafeToSpeculativelyExecute(CI))
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return false;
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}
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// Merge \param SecondEntryBlock into \param FirstEntryBlock.
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FirstEntryBlock->getInstList().pop_back();
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FirstEntryBlock->getInstList()
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.splice(FirstEntryBlock->end(), SecondEntryBlock->getInstList());
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BranchInst *PBI = dyn_cast<BranchInst>(FirstEntryBlock->getTerminator());
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Value *CC = PBI->getCondition();
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BasicBlock *SaveInsertBB = Builder.GetInsertBlock();
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BasicBlock::iterator SaveInsertPt = Builder.GetInsertPoint();
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Builder.SetInsertPoint(PBI);
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Value *NC = Builder.CreateOr(CInst1, CC);
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PBI->replaceUsesOfWith(CC, NC);
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Builder.SetInsertPoint(SaveInsertBB, SaveInsertPt);
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// Remove IfTrue1
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if (IfTrue1 != FirstEntryBlock) {
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IfTrue1->dropAllReferences();
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IfTrue1->eraseFromParent();
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}
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// Remove IfFalse1
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if (IfFalse1 != FirstEntryBlock) {
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IfFalse1->dropAllReferences();
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IfFalse1->eraseFromParent();
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}
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// Remove \param SecondEntryBlock
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SecondEntryBlock->dropAllReferences();
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SecondEntryBlock->eraseFromParent();
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DEBUG(dbgs() << "If conditions merged into:\n" << *FirstEntryBlock);
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return true;
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}
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bool FlattenCFGOpt::run(BasicBlock *BB) {
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bool Changed = false;
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assert(BB && BB->getParent() && "Block not embedded in function!");
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assert(BB->getTerminator() && "Degenerate basic block encountered!");
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IRBuilder<> Builder(BB);
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if (FlattenParallelAndOr(BB, Builder))
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return true;
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if (MergeIfRegion(BB, Builder))
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return true;
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return Changed;
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}
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/// FlattenCFG - This function is used to flatten a CFG. For
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/// example, it uses parallel-and and parallel-or mode to collapse
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// if-conditions and merge if-regions with identical statements.
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///
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bool llvm::FlattenCFG(BasicBlock *BB, AliasAnalysis *AA) {
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return FlattenCFGOpt(AA).run(BB);
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}
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